intel: Add a batch flush between front-buffer downsample and X protocol.

[mesa.git] / src / mesa / drivers / dri / i965 / brw_eu_util.c

diff --git a/src/mesa/drivers/dri/i965/brw_eu_util.c b/src/mesa/drivers/dri/i965/brw_eu_util.c
index 5405cf17a4eb4a4e407af0ef18010d37b4e7ea17..2037634981c596f17ecf0c2936ad2844a95d5771 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_eu_util.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_util.c
@@ -42,7 +42,6 @@ void brw_math_invert( struct brw_compile *p,
    brw_math( p, 
             dst,
             BRW_MATH_FUNCTION_INV, 
-            BRW_MATH_SATURATE_NONE,
             0,
             src,
             BRW_MATH_PRECISION_FULL,