i965/miptree: Add real support for HiZ
[mesa.git] / src / mesa / drivers / dri / i965 / brw_eu_validate.c
index ed536bfff2bc27fd1e2623e2eea1cf0d4992abf4..15fc25b126a8f64d38b6f9e5c1cc8287a41ed4bc 100644 (file)
@@ -39,7 +39,7 @@ cat(struct string *dest, const struct string src)
 {
    dest->str = realloc(dest->str, dest->len + src.len + 1);
    memcpy(dest->str + dest->len, src.str, src.len);
-   dest->str[dest->len + src.len + 1] = '\0';
+   dest->str[dest->len + src.len] = '\0';
    dest->len = dest->len + src.len;
 }
 #define CAT(dest, src) cat(&dest, (struct string){src, strlen(src)})
@@ -68,10 +68,18 @@ src1_is_null(const struct brw_device_info *devinfo, const brw_inst *inst)
           brw_inst_src1_da_reg_nr(devinfo, inst) == BRW_ARF_NULL;
 }
 
+static bool
+src0_is_grf(const struct brw_device_info *devinfo, const brw_inst *inst)
+{
+   return brw_inst_src0_reg_file(devinfo, inst) == BRW_GENERAL_REGISTER_FILE;
+}
+
 static unsigned
 num_sources_from_inst(const struct brw_device_info *devinfo,
                       const brw_inst *inst)
 {
+   const struct opcode_desc *desc =
+      brw_opcode_desc(devinfo, brw_inst_opcode(devinfo, inst));
    unsigned math_function;
 
    if (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MATH) {
@@ -86,8 +94,10 @@ num_sources_from_inst(const struct brw_device_info *devinfo,
           */
          return 0;
       }
+   } else if (desc) {
+      return desc->nsrc;
    } else {
-      return opcode_descs[brw_inst_opcode(devinfo, inst)].nsrc;
+      return 0;
    }
 
    switch (math_function) {
@@ -113,6 +123,13 @@ num_sources_from_inst(const struct brw_device_info *devinfo,
    }
 }
 
+static bool
+is_unsupported_inst(const struct brw_device_info *devinfo,
+                    const brw_inst *inst)
+{
+   return brw_opcode_desc(devinfo, brw_inst_opcode(devinfo, inst)) == NULL;
+}
+
 bool
 brw_validate_instructions(const struct brw_codegen *p, int start_offset,
                           struct annotation_info *annotation)
@@ -143,6 +160,21 @@ brw_validate_instructions(const struct brw_codegen *p, int start_offset,
          break;
       }
 
+      ERROR_IF(is_unsupported_inst(devinfo, inst),
+               "Instruction not supported on this Gen");
+
+      if (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SEND) {
+         ERROR_IF(brw_inst_src0_address_mode(devinfo, inst) !=
+                  BRW_ADDRESS_DIRECT, "send must use direct addressing");
+
+         if (devinfo->gen >= 7) {
+            ERROR_IF(!src0_is_grf(devinfo, inst), "send from non-GRF");
+            ERROR_IF(brw_inst_eot(devinfo, inst) &&
+                     brw_inst_src0_da_reg_nr(devinfo, inst) < 112,
+                     "send with EOT must use g112-g127");
+         }
+      }
+
       if (error_msg.str && annotation) {
          annotation_insert_error(annotation, src_offset, error_msg.str);
       }