i965/gen9: Optimize slice and subslice load balancing behavior.

[mesa.git] / src / mesa / drivers / dri / i965 / brw_ff_gs.h

diff --git a/src/mesa/drivers/dri/i965/brw_ff_gs.h b/src/mesa/drivers/dri/i965/brw_ff_gs.h
index e952b6413de63b0403d08dcf6eba0114250880d5..b32b20d89bdd3c941bfe687dd8ba60bf58e32833 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_ff_gs.h
+++ b/src/mesa/drivers/dri/i965/brw_ff_gs.h
@@ -35,7 +35,7 @@
 
 
 #include "brw_context.h"
-#include "brw_eu.h"
+#include "compiler/brw_eu.h"
 
 #define MAX_GS_VERTS (4)
 
@@ -110,7 +110,6 @@ void brw_ff_gs_lines(struct brw_ff_gs_compile *c);
 void gen6_sol_program(struct brw_ff_gs_compile *c,
                       struct brw_ff_gs_prog_key *key,
                       unsigned num_verts, bool check_edge_flag);
-void gen6_brw_upload_ff_gs_prog(struct brw_context *brw);
 
 void
 brw_upload_ff_gs_prog(struct brw_context *brw);