#include "brw_eu.h"
#include "brw_wm.h"
#include "brw_shader.h"
+#include "intel_asm_printer.h"
}
#include "gen8_generator.h"
#include "glsl/glsl_types.h"
#define MAX_SAMPLER_MESSAGE_SIZE 11
-class bblock_t;
+struct bblock_t;
namespace {
struct acp_entry;
}
};
class fs_inst : public backend_instruction {
+ fs_inst &operator=(const fs_inst &);
+
public:
DECLARE_RALLOC_CXX_OPERATORS(fs_inst)
- void init();
+ void init(enum opcode opcode, const fs_reg &dst, fs_reg *src, int sources);
+
+ fs_inst(enum opcode opcode = BRW_OPCODE_NOP, const fs_reg &dst = reg_undef);
+ fs_inst(enum opcode opcode, const fs_reg &dst, const fs_reg &src0);
+ fs_inst(enum opcode opcode, const fs_reg &dst, const fs_reg &src0,
+ const fs_reg &src1);
+ fs_inst(enum opcode opcode, const fs_reg &dst, const fs_reg &src0,
+ const fs_reg &src1, const fs_reg &src2);
+ fs_inst(enum opcode opcode, const fs_reg &dst, fs_reg src[], int sources);
+ fs_inst(const fs_inst &that);
- fs_inst();
- fs_inst(enum opcode opcode);
- fs_inst(enum opcode opcode, fs_reg dst);
- fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0);
- fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1);
- fs_inst(enum opcode opcode, fs_reg dst,
- fs_reg src0, fs_reg src1,fs_reg src2);
+ void resize_sources(uint8_t num_sources);
bool equals(fs_inst *inst) const;
bool overwrites_reg(const fs_reg ®) const;
bool is_send_from_grf() const;
bool is_partial_write() const;
int regs_read(fs_visitor *v, int arg) const;
+ bool can_do_source_mods(struct brw_context *brw);
bool reads_flag() const;
bool writes_flag() const;
fs_reg dst;
- fs_reg src[3];
-
- /** @{
- * Annotation for the generated IR. One of the two can be set.
- */
- const void *ir;
- const char *annotation;
- /** @} */
+ fs_reg *src;
uint32_t texture_offset; /**< Texture offset bitfield */
uint32_t offset; /* spill/unspill offset */
+ uint8_t sources; /**< Number of fs_reg sources. */
uint8_t conditional_mod; /**< BRW_CONDITIONAL_* */
/* Chooses which flag subregister (f0.0 or f0.1) is used for conditional
public:
fs_visitor(struct brw_context *brw,
- struct brw_wm_compile *c,
+ void *mem_ctx,
+ const struct brw_wm_prog_key *key,
+ struct brw_wm_prog_data *prog_data,
struct gl_shader_program *shader_prog,
struct gl_fragment_program *fp,
unsigned dispatch_width);
uint32_t gather_channel(ir_texture *ir, int sampler);
void swizzle_result(ir_texture *ir, fs_reg orig_val, int sampler);
- bool can_do_source_mods(fs_inst *inst);
-
fs_inst *emit(fs_inst *inst);
void emit(exec_list list);
fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1);
fs_inst *emit(enum opcode opcode, fs_reg dst,
fs_reg src0, fs_reg src1, fs_reg src2);
+ fs_inst *emit(enum opcode opcode, fs_reg dst,
+ fs_reg src[], int sources);
fs_inst *MOV(fs_reg dst, fs_reg src);
fs_inst *NOT(fs_reg dst, fs_reg src);
fs_inst *end,
const fs_reg ®);
+ fs_inst *LOAD_PAYLOAD(const fs_reg &dst, fs_reg *src, int sources);
+
exec_list VARYING_PULL_CONSTANT_LOAD(const fs_reg &dst,
const fs_reg &surf_index,
const fs_reg &varying_offset,
void fail(const char *msg, ...);
void no16(const char *msg, ...);
void lower_uniform_pull_constant_loads();
+ bool lower_load_payload();
void push_force_uncompressed();
void pop_force_uncompressed();
fs_reg *emit_frontfacing_interpolation(ir_variable *ir);
fs_reg *emit_samplepos_setup(ir_variable *ir);
fs_reg *emit_sampleid_setup(ir_variable *ir);
- fs_reg *emit_samplemaskin_setup(ir_variable *ir);
fs_reg *emit_general_interpolation(ir_variable *ir);
void emit_interpolation_setup_gen4();
void emit_interpolation_setup_gen6();
int implied_mrf_writes(fs_inst *inst);
virtual void dump_instructions();
+ virtual void dump_instructions(const char *name);
void dump_instruction(backend_instruction *inst);
+ void dump_instruction(backend_instruction *inst, FILE *file);
void visit_atomic_counter_intrinsic(ir_call *ir);
struct gl_fragment_program *fp;
- struct brw_wm_compile *c;
+ const struct brw_wm_prog_key *const key;
+ struct brw_wm_prog_data *prog_data;
unsigned int sanity_param_count;
int *param_size;
/** Number of uniform variable components visited. */
unsigned uniforms;
+ /** Byte-offset for the next available spot in the scratch space buffer. */
+ unsigned last_scratch;
+
/**
* Array mapping UNIFORM register numbers to the pull parameter index,
* or -1 if this uniform register isn't being uploaded as a pull constant.
/* Result of last visit() method. */
fs_reg result;
+ /** Register numbers for thread payload fields. */
+ struct {
+ uint8_t source_depth_reg;
+ uint8_t source_w_reg;
+ uint8_t aa_dest_stencil_reg;
+ uint8_t dest_depth_reg;
+ uint8_t sample_pos_reg;
+ uint8_t sample_mask_in_reg;
+ uint8_t barycentric_coord_reg[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
+
+ /** The number of thread payload registers the hardware will supply. */
+ uint8_t num_regs;
+ } payload;
+
+ bool source_depth_to_render_target;
+ bool runtime_check_aads_emit;
+
fs_reg pixel_x;
fs_reg pixel_y;
fs_reg wpos_w;
{
public:
fs_generator(struct brw_context *brw,
- struct brw_wm_compile *c,
+ void *mem_ctx,
+ const struct brw_wm_prog_key *key,
+ struct brw_wm_prog_data *prog_data,
struct gl_shader_program *prog,
struct gl_fragment_program *fp,
- bool dual_source_output);
+ bool dual_source_output,
+ bool runtime_check_aads_emit,
+ bool debug_flag);
~fs_generator();
const unsigned *generate_assembly(exec_list *simd8_instructions,
exec_list *simd16_instructions,
- unsigned *assembly_size,
- FILE *dump_file = NULL);
+ unsigned *assembly_size);
private:
- void generate_code(exec_list *instructions, FILE *dump_file);
+ void generate_code(exec_list *instructions);
+ void fire_fb_write(fs_inst *inst,
+ GLuint base_reg,
+ struct brw_reg implied_header,
+ GLuint nr);
void generate_fb_write(fs_inst *inst);
void generate_blorp_fb_write(fs_inst *inst);
void generate_pixel_xy(struct brw_reg dst, bool is_x);
void generate_linterp(fs_inst *inst, struct brw_reg dst,
struct brw_reg *src);
void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
- void generate_math1_gen7(fs_inst *inst,
- struct brw_reg dst,
- struct brw_reg src);
- void generate_math2_gen7(fs_inst *inst,
- struct brw_reg dst,
- struct brw_reg src0,
- struct brw_reg src1);
- void generate_math1_gen6(fs_inst *inst,
- struct brw_reg dst,
- struct brw_reg src);
- void generate_math2_gen6(fs_inst *inst,
- struct brw_reg dst,
- struct brw_reg src0,
- struct brw_reg src1);
+ void generate_math_gen6(fs_inst *inst,
+ struct brw_reg dst,
+ struct brw_reg src0,
+ struct brw_reg src1);
void generate_math_gen4(fs_inst *inst,
struct brw_reg dst,
struct brw_reg src);
struct brw_reg dst,
struct brw_reg surf_index);
- void patch_discard_jumps_to_fb_writes();
+ bool patch_discard_jumps_to_fb_writes();
struct brw_context *brw;
struct gl_context *ctx;
struct brw_compile *p;
- struct brw_wm_compile *c;
+ const struct brw_wm_prog_key *const key;
+ struct brw_wm_prog_data *prog_data;
struct gl_shader_program *prog;
const struct gl_fragment_program *fp;
exec_list discard_halt_patches;
bool dual_source_output;
+ bool runtime_check_aads_emit;
+ const bool debug_flag;
void *mem_ctx;
};
{
public:
gen8_fs_generator(struct brw_context *brw,
- struct brw_wm_compile *c,
+ void *mem_ctx,
+ const struct brw_wm_prog_key *key,
+ struct brw_wm_prog_data *prog_data,
struct gl_shader_program *prog,
struct gl_fragment_program *fp,
bool dual_source_output);
void generate_unpack_half_2x16_split(fs_inst *inst,
struct brw_reg dst,
struct brw_reg src);
+ void generate_untyped_atomic(fs_inst *inst,
+ struct brw_reg dst,
+ struct brw_reg atomic_op,
+ struct brw_reg surf_index);
+
+ void generate_untyped_surface_read(fs_inst *inst,
+ struct brw_reg dst,
+ struct brw_reg surf_index);
void generate_discard_jump(fs_inst *ir);
- void patch_discard_jumps_to_fb_writes();
+ bool patch_discard_jumps_to_fb_writes();
- struct brw_wm_compile *c;
+ const struct brw_wm_prog_key *const key;
+ struct brw_wm_prog_data *prog_data;
const struct gl_fragment_program *fp;
unsigned dispatch_width; /** 8 or 16 */
projects / mesa.git / blobdiff