i965/fs: Move brw_wm_compile::fp to fs_visitor.

[mesa.git] / src / mesa / drivers / dri / i965 / brw_fs.h

diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
index 0b2681d6cdd8de8346f0faa7b0fc5e02b2c4d7de..850782547488f70952da2f86d6ccc13460fdd197 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -184,8 +184,10 @@ class fs_visitor : public backend_visitor
 {
 public:
 
-   fs_visitor(struct brw_wm_compile *c, struct gl_shader_program *prog,
-              struct brw_shader *shader);
+   fs_visitor(struct brw_wm_compile *c,
+              struct gl_shader_program *prog,
+              struct gl_fragment_program *fp,
+              unsigned dispatch_width);
    ~fs_visitor();
 
    fs_reg *variable_storage(ir_variable *var);
@@ -213,6 +215,7 @@ public:
    void swizzle_result(ir_texture *ir, fs_reg orig_val, int sampler);
 
    fs_inst *emit(fs_inst inst);
+   fs_inst *emit(fs_inst *inst);
 
    fs_inst *emit(enum opcode opcode);
    fs_inst *emit(enum opcode opcode, fs_reg dst);
@@ -221,12 +224,35 @@ public:
    fs_inst *emit(enum opcode opcode, fs_reg dst,
                  fs_reg src0, fs_reg src1, fs_reg src2);
 
+   fs_inst *MOV(fs_reg dst, fs_reg src);
+   fs_inst *NOT(fs_reg dst, fs_reg src);
+   fs_inst *RNDD(fs_reg dst, fs_reg src);
+   fs_inst *RNDE(fs_reg dst, fs_reg src);
+   fs_inst *RNDZ(fs_reg dst, fs_reg src);
+   fs_inst *FRC(fs_reg dst, fs_reg src);
+   fs_inst *ADD(fs_reg dst, fs_reg src0, fs_reg src1);
+   fs_inst *MUL(fs_reg dst, fs_reg src0, fs_reg src1);
+   fs_inst *MACH(fs_reg dst, fs_reg src0, fs_reg src1);
+   fs_inst *MAC(fs_reg dst, fs_reg src0, fs_reg src1);
+   fs_inst *SHL(fs_reg dst, fs_reg src0, fs_reg src1);
+   fs_inst *SHR(fs_reg dst, fs_reg src0, fs_reg src1);
+   fs_inst *ASR(fs_reg dst, fs_reg src0, fs_reg src1);
+   fs_inst *AND(fs_reg dst, fs_reg src0, fs_reg src1);
+   fs_inst *OR(fs_reg dst, fs_reg src0, fs_reg src1);
+   fs_inst *XOR(fs_reg dst, fs_reg src0, fs_reg src1);
+   fs_inst *IF(uint32_t predicate);
+   fs_inst *IF(fs_reg src0, fs_reg src1, uint32_t condition);
+   fs_inst *CMP(fs_reg dst, fs_reg src0, fs_reg src1,
+                uint32_t condition);
+
    int type_size(const struct glsl_type *type);
    fs_inst *get_instruction_generating_reg(fs_inst *start,
                                           fs_inst *end,
                                           fs_reg reg);
 
    bool run();
+   void setup_payload_gen4();
+   void setup_payload_gen6();
    void setup_paramvalues_refs();
    void assign_curb_setup();
    void calculate_urb_setup();
@@ -240,6 +266,7 @@ public:
    int choose_spill_reg(struct ra_graph *g);
    void spill_reg(int spill_reg);
    void split_virtual_grfs();
+   void compact_virtual_grfs();
    void setup_pull_constants();
    void calculate_live_intervals();
    bool opt_algebraic();
@@ -248,7 +275,8 @@ public:
    bool opt_copy_propagate();
    bool try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry);
    bool try_constant_propagate(fs_inst *inst, acp_entry *entry);
-   bool opt_copy_propagate_local(void *mem_ctx, bblock_t *block);
+   bool opt_copy_propagate_local(void *mem_ctx, bblock_t *block,
+                                 exec_list *acp);
    bool register_coalesce();
    bool register_coalesce_2();
    bool compute_to_mrf();
@@ -418,14 +446,13 @@ public:
    fs_reg pixel_w;
    fs_reg delta_x[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
    fs_reg delta_y[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
-   fs_reg reg_null_cmp;
 
    int grf_used;
 
+   const unsigned dispatch_width; /**< 8 or 16 */
+
    int force_uncompressed_stack;
    int force_sechalf_stack;
-
-   class bblock_t *bblock;
 };
 
 bool brw_do_channel_expressions(struct exec_list *instructions);