i965/fs: Make null_reg_* const members of fs_visitor instead of globals
[mesa.git] / src / mesa / drivers / dri / i965 / brw_fs.h
index dfb13ea709d41d8cb253fa68fe42bdeb3d1d1d9d..9c6b047d6ea059abb1044df8c19932a01349912f 100644 (file)
@@ -39,7 +39,7 @@ extern "C" {
 #include "program/prog_parameter.h"
 #include "program/prog_print.h"
 #include "program/prog_optimize.h"
-#include "program/register_allocate.h"
+#include "util/register_allocate.h"
 #include "program/sampler.h"
 #include "program/hash_table.h"
 #include "brw_context.h"
@@ -48,7 +48,6 @@ extern "C" {
 #include "brw_shader.h"
 #include "intel_asm_annotation.h"
 }
-#include "gen8_generator.h"
 #include "glsl/glsl_types.h"
 #include "glsl/ir.h"
 
@@ -135,9 +134,6 @@ half(const fs_reg &reg, unsigned idx)
 }
 
 static const fs_reg reg_undef;
-static const fs_reg reg_null_f(retype(brw_null_reg(), BRW_REGISTER_TYPE_F));
-static const fs_reg reg_null_d(retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
-static const fs_reg reg_null_ud(retype(brw_null_reg(), BRW_REGISTER_TYPE_UD));
 
 class ip_record : public exec_node {
 public:
@@ -207,6 +203,9 @@ public:
 class fs_visitor : public backend_visitor
 {
 public:
+   const fs_reg reg_null_f;
+   const fs_reg reg_null_d;
+   const fs_reg reg_null_ud;
 
    fs_visitor(struct brw_context *brw,
               void *mem_ctx,
@@ -216,6 +215,7 @@ public:
               struct gl_fragment_program *fp,
               unsigned dispatch_width);
    ~fs_visitor();
+   void init();
 
    fs_reg *variable_storage(ir_variable *var);
    int virtual_grf_alloc(int size);
@@ -340,6 +340,7 @@ public:
    bool opt_copy_propagate_local(void *mem_ctx, bblock_t *block,
                                  exec_list *acp);
    void opt_drop_redundant_mov_to_flags();
+   bool opt_register_renaming();
    bool register_coalesce();
    bool compute_to_mrf();
    bool dead_code_eliminate();
@@ -347,8 +348,10 @@ public:
    bool virtual_grf_interferes(int a, int b);
    void schedule_instructions(instruction_scheduler_mode mode);
    void insert_gen4_send_dependency_workarounds();
-   void insert_gen4_pre_send_dependency_workarounds(fs_inst *inst);
-   void insert_gen4_post_send_dependency_workarounds(fs_inst *inst);
+   void insert_gen4_pre_send_dependency_workarounds(bblock_t *block,
+                                                    fs_inst *inst);
+   void insert_gen4_post_send_dependency_workarounds(bblock_t *block,
+                                                     fs_inst *inst);
    void vfail(const char *msg, va_list args);
    void fail(const char *msg, ...);
    void no16(const char *msg, ...);
@@ -359,12 +362,13 @@ public:
    void pop_force_uncompressed();
 
    void emit_dummy_fs();
+   void emit_repclear_shader();
    fs_reg *emit_fragcoord_interpolation(ir_variable *ir);
    fs_inst *emit_linterp(const fs_reg &attr, const fs_reg &interp,
                          glsl_interp_qualifier interpolation_mode,
                          bool is_centroid, bool is_sample);
-   fs_reg *emit_frontfacing_interpolation(ir_variable *ir);
-   fs_reg *emit_samplepos_setup(ir_variable *ir);
+   fs_reg *emit_frontfacing_interpolation();
+   fs_reg *emit_samplepos_setup();
    fs_reg *emit_sampleid_setup(ir_variable *ir);
    fs_reg *emit_general_interpolation(ir_variable *ir);
    void emit_interpolation_setup_gen4();
@@ -380,8 +384,8 @@ public:
                               fs_reg sample_index, uint32_t sampler);
    fs_inst *emit_texture_gen7(ir_texture *ir, fs_reg dst, fs_reg coordinate,
                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2,
-                              fs_reg sample_index, fs_reg mcs, uint32_t sampler);
-   fs_reg emit_mcs_fetch(ir_texture *ir, fs_reg coordinate, uint32_t sampler);
+                              fs_reg sample_index, fs_reg mcs, fs_reg sampler);
+   fs_reg emit_mcs_fetch(ir_texture *ir, fs_reg coordinate, fs_reg sampler);
    void emit_gen6_gather_wa(uint8_t wa, fs_reg dst);
    fs_reg fix_math_operand(fs_reg src);
    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0);
@@ -398,8 +402,8 @@ public:
    bool opt_saturate_propagation();
    void emit_bool_to_cond_code(ir_rvalue *condition);
    void emit_if_gen6(ir_if *ir);
-   void emit_unspill(fs_inst *inst, fs_reg reg, uint32_t spill_offset,
-                     int count);
+   void emit_unspill(bblock_t *block, fs_inst *inst, fs_reg reg,
+                     uint32_t spill_offset, int count);
 
    void emit_fragment_program_code();
    void setup_fp_regs();
@@ -466,9 +470,8 @@ public:
 
    void visit_atomic_counter_intrinsic(ir_call *ir);
 
-   struct gl_fragment_program *fp;
-   const struct brw_wm_prog_key *const key;
-   struct brw_wm_prog_data *prog_data;
+   const void *const key;
+   struct brw_stage_prog_data *prog_data;
    unsigned int sanity_param_count;
 
    int *param_size;
@@ -572,25 +575,25 @@ public:
                 void *mem_ctx,
                 const struct brw_wm_prog_key *key,
                 struct brw_wm_prog_data *prog_data,
-                struct gl_shader_program *prog,
+                struct gl_shader_program *shader_prog,
                 struct gl_fragment_program *fp,
-                bool dual_source_output,
                 bool runtime_check_aads_emit,
                 bool debug_flag);
    ~fs_generator();
 
-   const unsigned *generate_assembly(exec_list *simd8_instructions,
-                                     exec_list *simd16_instructions,
+   const unsigned *generate_assembly(const cfg_t *simd8_cfg,
+                                     const cfg_t *simd16_cfg,
                                      unsigned *assembly_size);
 
 private:
-   void generate_code(exec_list *instructions);
+   void generate_code(const cfg_t *cfg);
    void fire_fb_write(fs_inst *inst,
                       GLuint base_reg,
                       struct brw_reg implied_header,
                       GLuint nr);
    void generate_fb_write(fs_inst *inst);
    void generate_blorp_fb_write(fs_inst *inst);
+   void generate_rep_fb_write(fs_inst *inst);
    void generate_pixel_xy(struct brw_reg dst, bool is_x);
    void generate_linterp(fs_inst *inst, struct brw_reg dst,
                         struct brw_reg *src);
@@ -606,9 +609,9 @@ private:
    void generate_math_g45(fs_inst *inst,
                          struct brw_reg dst,
                          struct brw_reg src);
-   void generate_ddx(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
+   void generate_ddx(fs_inst *inst, struct brw_reg dst, struct brw_reg src, struct brw_reg quality);
    void generate_ddy(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
-                     bool negate_value);
+                     struct brw_reg quality, bool negate_value);
    void generate_scratch_write(fs_inst *inst, struct brw_reg src);
    void generate_scratch_read(fs_inst *inst, struct brw_reg dst);
    void generate_scratch_read_gen7(fs_inst *inst, struct brw_reg dst);
@@ -676,107 +679,21 @@ private:
    struct gl_context *ctx;
 
    struct brw_compile *p;
-   const struct brw_wm_prog_key *const key;
-   struct brw_wm_prog_data *prog_data;
+   gl_shader_stage stage;
+   const void * const key;
+   struct brw_stage_prog_data * const prog_data;
 
-   struct gl_shader_program *prog;
-   const struct gl_fragment_program *fp;
+   struct gl_shader_program * const shader_prog;
+   const struct gl_program *prog;
 
    unsigned dispatch_width; /**< 8 or 16 */
 
    exec_list discard_halt_patches;
-   bool dual_source_output;
    bool runtime_check_aads_emit;
    const bool debug_flag;
    void *mem_ctx;
 };
 
-/**
- * The fragment shader code generator.
- *
- * Translates FS IR to actual i965 assembly code.
- */
-class gen8_fs_generator : public gen8_generator
-{
-public:
-   gen8_fs_generator(struct brw_context *brw,
-                     void *mem_ctx,
-                     const struct brw_wm_prog_key *key,
-                     struct brw_wm_prog_data *prog_data,
-                     struct gl_shader_program *prog,
-                     struct gl_fragment_program *fp,
-                     bool dual_source_output);
-   ~gen8_fs_generator();
-
-   const unsigned *generate_assembly(exec_list *simd8_instructions,
-                                     exec_list *simd16_instructions,
-                                     unsigned *assembly_size);
-
-private:
-   void generate_code(exec_list *instructions);
-   void generate_fb_write(fs_inst *inst);
-   void generate_linterp(fs_inst *inst, struct brw_reg dst,
-                         struct brw_reg *src);
-   void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
-                     struct brw_reg sampler_index);
-   void generate_math1(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
-   void generate_math2(fs_inst *inst, struct brw_reg dst,
-                       struct brw_reg src0, struct brw_reg src1);
-   void generate_ddx(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
-   void generate_ddy(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
-                     bool negate_value);
-   void generate_scratch_write(fs_inst *inst, struct brw_reg src);
-   void generate_scratch_read(fs_inst *inst, struct brw_reg dst);
-   void generate_scratch_read_gen7(fs_inst *inst, struct brw_reg dst);
-   void generate_uniform_pull_constant_load(fs_inst *inst,
-                                            struct brw_reg dst,
-                                            struct brw_reg index,
-                                            struct brw_reg offset);
-   void generate_varying_pull_constant_load(fs_inst *inst,
-                                            struct brw_reg dst,
-                                            struct brw_reg index,
-                                            struct brw_reg offset);
-   void generate_mov_dispatch_to_flags(fs_inst *ir);
-   void generate_set_omask(fs_inst *ir,
-                           struct brw_reg dst,
-                           struct brw_reg sample_mask);
-   void generate_set_sample_id(fs_inst *ir,
-                               struct brw_reg dst,
-                               struct brw_reg src0,
-                               struct brw_reg src1);
-   void generate_set_simd4x2_offset(fs_inst *ir,
-                                    struct brw_reg dst,
-                                    struct brw_reg offset);
-   void generate_pack_half_2x16_split(fs_inst *inst,
-                                      struct brw_reg dst,
-                                      struct brw_reg x,
-                                      struct brw_reg y);
-   void generate_unpack_half_2x16_split(fs_inst *inst,
-                                        struct brw_reg dst,
-                                        struct brw_reg src);
-   void generate_untyped_atomic(fs_inst *inst,
-                                struct brw_reg dst,
-                                struct brw_reg atomic_op,
-                                struct brw_reg surf_index);
-
-   void generate_untyped_surface_read(fs_inst *inst,
-                                      struct brw_reg dst,
-                                      struct brw_reg surf_index);
-   void generate_discard_jump(fs_inst *ir);
-
-   bool patch_discard_jumps_to_fb_writes();
-
-   const struct brw_wm_prog_key *const key;
-   struct brw_wm_prog_data *prog_data;
-   const struct gl_fragment_program *fp;
-
-   unsigned dispatch_width; /** 8 or 16 */
-
-   bool dual_source_output;
-
-   exec_list discard_halt_patches;
-};
-
 bool brw_do_channel_expressions(struct exec_list *instructions);
 bool brw_do_vector_splitting(struct exec_list *instructions);
 bool brw_fs_precompile(struct gl_context *ctx, struct gl_shader_program *prog);