class bblock_t;
namespace {
- class acp_entry;
+ struct acp_entry;
}
-enum register_file {
- BAD_FILE,
- ARF,
- GRF,
- MRF,
- IMM,
- FIXED_HW_REG, /* a struct brw_reg */
- UNIFORM, /* prog_data->params[reg] */
-};
-
class fs_reg {
public:
/* Callers of this ralloc-based new need not call delete. It's
bool equals(const fs_reg &r) const;
bool is_zero() const;
bool is_one() const;
+ bool is_valid_3src() const;
/** Register file: ARF, GRF, MRF, IMM. */
enum register_file file;
static const fs_reg reg_null_f(ARF, BRW_ARF_NULL, BRW_REGISTER_TYPE_F);
static const fs_reg reg_null_d(ARF, BRW_ARF_NULL, BRW_REGISTER_TYPE_D);
+class ip_record : public exec_node {
+public:
+ static void* operator new(size_t size, void *ctx)
+ {
+ void *node;
+
+ node = rzalloc_size(ctx, size);
+ assert(node != NULL);
+
+ return node;
+ }
+
+ ip_record(int ip)
+ {
+ this->ip = ip;
+ }
+
+ int ip;
+};
+
class fs_inst : public backend_instruction {
public:
/* Callers of this ralloc-based new need not call delete. It's
fs_reg src0, fs_reg src1,fs_reg src2);
bool equals(fs_inst *inst);
- int regs_written();
bool overwrites_reg(const fs_reg ®);
- bool is_tex();
- bool is_math();
bool is_send_from_grf();
+ bool is_partial_write();
fs_reg dst;
fs_reg src[3];
uint8_t flag_subreg;
int mlen; /**< SEND message length */
+ int regs_written; /**< Number of vgrfs written by a SEND message, or 1 */
int base_mrf; /**< First MRF in the SEND message, if mlen is nonzero. */
uint32_t texture_offset; /**< Texture offset bitfield */
int sampler;
fs_visitor(struct brw_context *brw,
struct brw_wm_compile *c,
- struct gl_shader_program *prog,
+ struct gl_shader_program *shader_prog,
struct gl_fragment_program *fp,
unsigned dispatch_width);
~fs_visitor();
fs_inst *IF(fs_reg src0, fs_reg src1, uint32_t condition);
fs_inst *CMP(fs_reg dst, fs_reg src0, fs_reg src1,
uint32_t condition);
+ fs_inst *LRP(fs_reg dst, fs_reg a, fs_reg y, fs_reg x);
+ fs_inst *DEP_RESOLVE_MOV(int grf);
+ fs_inst *BFREV(fs_reg dst, fs_reg value);
+ fs_inst *BFE(fs_reg dst, fs_reg bits, fs_reg offset, fs_reg value);
+ fs_inst *BFI1(fs_reg dst, fs_reg bits, fs_reg offset);
+ fs_inst *BFI2(fs_reg dst, fs_reg bfi1_dst, fs_reg insert, fs_reg base);
+ fs_inst *FBH(fs_reg dst, fs_reg value);
+ fs_inst *FBL(fs_reg dst, fs_reg value);
+ fs_inst *CBIT(fs_reg dst, fs_reg value);
int type_size(const struct glsl_type *type);
fs_inst *get_instruction_generating_reg(fs_inst *start,
fs_reg reg);
exec_list VARYING_PULL_CONSTANT_LOAD(fs_reg dst, fs_reg surf_index,
- fs_reg offset);
+ fs_reg varying_offset,
+ uint32_t const_offset);
bool run();
void setup_payload_gen4();
void setup_payload_gen6();
- void setup_paramvalues_refs();
void assign_curb_setup();
void calculate_urb_setup();
void assign_urb_setup();
bool register_coalesce_2();
bool compute_to_mrf();
bool dead_code_eliminate();
+ bool dead_code_eliminate_local();
bool remove_dead_constants();
bool remove_duplicate_mrf_writes();
bool virtual_grf_interferes(int a, int b);
- void schedule_instructions();
+ void schedule_instructions(bool post_reg_alloc);
+ void insert_gen4_send_dependency_workarounds();
+ void insert_gen4_pre_send_dependency_workarounds(fs_inst *inst);
+ void insert_gen4_post_send_dependency_workarounds(fs_inst *inst);
void fail(const char *msg, ...);
+ void lower_uniform_pull_constant_loads();
void push_force_uncompressed();
void pop_force_uncompressed();
fs_inst *emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate,
fs_reg shadow_comp, fs_reg lod, fs_reg lod2);
fs_inst *emit_texture_gen5(ir_texture *ir, fs_reg dst, fs_reg coordinate,
- fs_reg shadow_comp, fs_reg lod, fs_reg lod2);
+ fs_reg shadow_comp, fs_reg lod, fs_reg lod2,
+ fs_reg sample_index);
fs_inst *emit_texture_gen7(ir_texture *ir, fs_reg dst, fs_reg coordinate,
- fs_reg shadow_comp, fs_reg lod, fs_reg lod2);
+ fs_reg shadow_comp, fs_reg lod, fs_reg lod2,
+ fs_reg sample_index);
+ fs_reg fix_math_operand(fs_reg src);
fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0);
fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0, fs_reg src1);
+ void emit_lrp(fs_reg dst, fs_reg x, fs_reg y, fs_reg a);
void emit_minmax(uint32_t conditionalmod, fs_reg dst,
fs_reg src0, fs_reg src1);
bool try_emit_saturate(ir_expression *ir);
void emit_shader_time_begin();
void emit_shader_time_end();
void emit_shader_time_write(enum shader_time_shader_type type,
- fs_reg start, fs_reg end);
+ fs_reg value);
bool try_rewrite_rhs_to_dst(ir_assignment *ir,
fs_reg dst,
fs_reg get_timestamp();
struct brw_reg interp_reg(int location, int channel);
- int setup_uniform_values(int loc, const glsl_type *type);
+ void setup_uniform_values(ir_variable *ir);
void setup_builtin_uniform_values(ir_variable *ir);
int implied_mrf_writes(fs_inst *inst);
- void dump_instructions();
- void dump_instruction(fs_inst *inst);
+ void dump_instruction(backend_instruction *inst);
- const struct gl_fragment_program *fp;
+ struct gl_fragment_program *fp;
struct brw_wm_compile *c;
+ unsigned int sanity_param_count;
- /* Delayed setup of c->prog_data.params[] due to realloc of
- * ParamValues[] during compile.
- */
- int param_index[MAX_UNIFORMS * 4];
- int param_offset[MAX_UNIFORMS * 4];
int param_size[MAX_UNIFORMS * 4];
int *virtual_grf_sizes;
int virtual_grf_count;
int virtual_grf_array_size;
- int *virtual_grf_def;
- int *virtual_grf_use;
+ int *virtual_grf_start;
+ int *virtual_grf_end;
bool live_intervals_valid;
/* This is the map from UNIFORM hw_reg + reg_offset as generated by
* uniform index.
*/
int *params_remap;
+ int nr_params_remap;
struct hash_table *variable_ht;
fs_reg frag_depth;
int first_non_payload_grf;
/** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
int max_grf;
- int urb_setup[FRAG_ATTRIB_MAX];
+ int urb_setup[VARYING_SLOT_MAX];
fs_reg *fp_temp_regs;
fs_reg *fp_input_regs;
void generate_math_gen4(fs_inst *inst,
struct brw_reg dst,
struct brw_reg src);
+ void generate_math_g45(fs_inst *inst,
+ struct brw_reg dst,
+ struct brw_reg src);
void generate_ddx(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
void generate_ddy(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
bool negate_value);
void generate_uniform_pull_constant_load(fs_inst *inst, struct brw_reg dst,
struct brw_reg index,
struct brw_reg offset);
+ void generate_uniform_pull_constant_load_gen7(fs_inst *inst,
+ struct brw_reg dst,
+ struct brw_reg surf_index,
+ struct brw_reg offset);
void generate_varying_pull_constant_load(fs_inst *inst, struct brw_reg dst,
- struct brw_reg index);
+ struct brw_reg index,
+ struct brw_reg offset);
void generate_varying_pull_constant_load_gen7(fs_inst *inst,
struct brw_reg dst,
struct brw_reg index,
struct brw_reg offset);
void generate_mov_dispatch_to_flags(fs_inst *inst);
+ void generate_set_simd4x2_offset(fs_inst *inst,
+ struct brw_reg dst,
+ struct brw_reg offset);
+ void generate_discard_jump(fs_inst *inst);
+
+ void generate_pack_half_2x16_split(fs_inst *inst,
+ struct brw_reg dst,
+ struct brw_reg x,
+ struct brw_reg y);
+ void generate_unpack_half_2x16_split(fs_inst *inst,
+ struct brw_reg dst,
+ struct brw_reg src);
+
+ void generate_shader_time_add(fs_inst *inst,
+ struct brw_reg payload,
+ struct brw_reg offset,
+ struct brw_reg value);
+
+ void patch_discard_jumps_to_fb_writes();
struct brw_context *brw;
struct intel_context *intel;
unsigned dispatch_width; /**< 8 or 16 */
+ exec_list discard_halt_patches;
bool dual_source_output;
void *mem_ctx;
};
projects / mesa.git / blobdiff