#include "brw_context.h"
#include "brw_eu.h"
#include "brw_wm.h"
+#include "brw_shader.h"
}
#include "glsl/glsl_types.h"
#include "glsl/ir.h"
-class fs_bblock;
+class bblock_t;
+namespace {
+ class acp_entry;
+}
enum register_file {
BAD_FILE,
return node;
}
- void init()
- {
- memset(this, 0, sizeof(*this));
- this->smear = -1;
- }
-
- /** Generic unset register constructor. */
- fs_reg()
- {
- init();
- this->file = BAD_FILE;
- }
-
- /** Immediate value constructor. */
- fs_reg(float f)
- {
- init();
- this->file = IMM;
- this->type = BRW_REGISTER_TYPE_F;
- this->imm.f = f;
- }
-
- /** Immediate value constructor. */
- fs_reg(int32_t i)
- {
- init();
- this->file = IMM;
- this->type = BRW_REGISTER_TYPE_D;
- this->imm.i = i;
- }
-
- /** Immediate value constructor. */
- fs_reg(uint32_t u)
- {
- init();
- this->file = IMM;
- this->type = BRW_REGISTER_TYPE_UD;
- this->imm.u = u;
- }
-
- /** Fixed brw_reg Immediate value constructor. */
- fs_reg(struct brw_reg fixed_hw_reg)
- {
- init();
- this->file = FIXED_HW_REG;
- this->fixed_hw_reg = fixed_hw_reg;
- this->type = fixed_hw_reg.type;
- }
+ void init();
+ fs_reg();
+ fs_reg(float f);
+ fs_reg(int32_t i);
+ fs_reg(uint32_t u);
+ fs_reg(struct brw_reg fixed_hw_reg);
fs_reg(enum register_file file, int reg);
fs_reg(enum register_file file, int reg, uint32_t type);
fs_reg(class fs_visitor *v, const struct glsl_type *type);
- bool equals(const fs_reg &r) const
- {
- return (file == r.file &&
- reg == r.reg &&
- reg_offset == r.reg_offset &&
- type == r.type &&
- negate == r.negate &&
- abs == r.abs &&
- memcmp(&fixed_hw_reg, &r.fixed_hw_reg,
- sizeof(fixed_hw_reg)) == 0 &&
- smear == r.smear &&
- imm.u == r.imm.u);
- }
+ bool equals(const fs_reg &r) const;
+ bool is_zero() const;
+ bool is_one() const;
/** Register file: ARF, GRF, MRF, IMM. */
enum register_file file;
uint32_t u;
float f;
} imm;
+
+ fs_reg *reladdr;
};
static const fs_reg reg_undef;
static const fs_reg reg_null_f(ARF, BRW_ARF_NULL, BRW_REGISTER_TYPE_F);
static const fs_reg reg_null_d(ARF, BRW_ARF_NULL, BRW_REGISTER_TYPE_D);
-class fs_inst : public exec_node {
+class ip_record : public exec_node {
public:
- /* Callers of this ralloc-based new need not call delete. It's
- * easier to just ralloc_free 'ctx' (or any of its ancestors). */
static void* operator new(size_t size, void *ctx)
{
void *node;
return node;
}
- void init()
- {
- memset(this, 0, sizeof(*this));
- this->opcode = BRW_OPCODE_NOP;
- this->conditional_mod = BRW_CONDITIONAL_NONE;
-
- this->dst = reg_undef;
- this->src[0] = reg_undef;
- this->src[1] = reg_undef;
- this->src[2] = reg_undef;
- }
-
- fs_inst()
+ ip_record(int ip)
{
- init();
+ this->ip = ip;
}
- fs_inst(enum opcode opcode)
- {
- init();
- this->opcode = opcode;
- }
-
- fs_inst(enum opcode opcode, fs_reg dst)
- {
- init();
- this->opcode = opcode;
- this->dst = dst;
-
- if (dst.file == GRF)
- assert(dst.reg_offset >= 0);
- }
-
- fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0)
- {
- init();
- this->opcode = opcode;
- this->dst = dst;
- this->src[0] = src0;
-
- if (dst.file == GRF)
- assert(dst.reg_offset >= 0);
- if (src[0].file == GRF)
- assert(src[0].reg_offset >= 0);
- }
+ int ip;
+};
- fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1)
+class fs_inst : public backend_instruction {
+public:
+ /* Callers of this ralloc-based new need not call delete. It's
+ * easier to just ralloc_free 'ctx' (or any of its ancestors). */
+ static void* operator new(size_t size, void *ctx)
{
- init();
- this->opcode = opcode;
- this->dst = dst;
- this->src[0] = src0;
- this->src[1] = src1;
-
- if (dst.file == GRF)
- assert(dst.reg_offset >= 0);
- if (src[0].file == GRF)
- assert(src[0].reg_offset >= 0);
- if (src[1].file == GRF)
- assert(src[1].reg_offset >= 0);
- }
+ void *node;
- fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1, fs_reg src2)
- {
- init();
- this->opcode = opcode;
- this->dst = dst;
- this->src[0] = src0;
- this->src[1] = src1;
- this->src[2] = src2;
-
- if (dst.file == GRF)
- assert(dst.reg_offset >= 0);
- if (src[0].file == GRF)
- assert(src[0].reg_offset >= 0);
- if (src[1].file == GRF)
- assert(src[1].reg_offset >= 0);
- if (src[2].file == GRF)
- assert(src[2].reg_offset >= 0);
- }
+ node = rzalloc_size(ctx, size);
+ assert(node != NULL);
- bool equals(fs_inst *inst)
- {
- return (opcode == inst->opcode &&
- dst.equals(inst->dst) &&
- src[0].equals(inst->src[0]) &&
- src[1].equals(inst->src[1]) &&
- src[2].equals(inst->src[2]) &&
- saturate == inst->saturate &&
- predicated == inst->predicated &&
- conditional_mod == inst->conditional_mod &&
- mlen == inst->mlen &&
- base_mrf == inst->base_mrf &&
- sampler == inst->sampler &&
- target == inst->target &&
- eot == inst->eot &&
- header_present == inst->header_present &&
- shadow_compare == inst->shadow_compare &&
- offset == inst->offset);
+ return node;
}
- int regs_written()
- {
- if (is_tex())
- return 4;
+ void init();
- /* The SINCOS and INT_DIV_QUOTIENT_AND_REMAINDER math functions return 2,
- * but we don't currently use them...nor do we have an opcode for them.
- */
+ fs_inst();
+ fs_inst(enum opcode opcode);
+ fs_inst(enum opcode opcode, fs_reg dst);
+ fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0);
+ fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1);
+ fs_inst(enum opcode opcode, fs_reg dst,
+ fs_reg src0, fs_reg src1,fs_reg src2);
- return 1;
- }
+ bool equals(fs_inst *inst);
+ int regs_written();
+ bool overwrites_reg(const fs_reg ®);
+ bool is_tex();
+ bool is_math();
+ bool is_send_from_grf();
- bool is_tex()
- {
- return (opcode == SHADER_OPCODE_TEX ||
- opcode == FS_OPCODE_TXB ||
- opcode == SHADER_OPCODE_TXD ||
- opcode == SHADER_OPCODE_TXF ||
- opcode == SHADER_OPCODE_TXL ||
- opcode == SHADER_OPCODE_TXS);
- }
-
- bool is_math()
- {
- return (opcode == SHADER_OPCODE_RCP ||
- opcode == SHADER_OPCODE_RSQ ||
- opcode == SHADER_OPCODE_SQRT ||
- opcode == SHADER_OPCODE_EXP2 ||
- opcode == SHADER_OPCODE_LOG2 ||
- opcode == SHADER_OPCODE_SIN ||
- opcode == SHADER_OPCODE_COS ||
- opcode == SHADER_OPCODE_INT_QUOTIENT ||
- opcode == SHADER_OPCODE_INT_REMAINDER ||
- opcode == SHADER_OPCODE_POW);
- }
-
- enum opcode opcode; /* BRW_OPCODE_* or FS_OPCODE_* */
fs_reg dst;
fs_reg src[3];
bool saturate;
- bool predicated;
- bool predicate_inverse;
int conditional_mod; /**< BRW_CONDITIONAL_* */
+ /* Chooses which flag subregister (f0.0 or f0.1) is used for conditional
+ * mod and predication.
+ */
+ uint8_t flag_subreg;
+
int mlen; /**< SEND message length */
int base_mrf; /**< First MRF in the SEND message, if mlen is nonzero. */
+ uint32_t texture_offset; /**< Texture offset bitfield */
int sampler;
int target; /**< MRT target. */
bool eot;
bool shadow_compare;
bool force_uncompressed;
bool force_sechalf;
+ bool force_writemask_all;
uint32_t offset; /* spill/unspill offset */
/** @{
* Annotation for the generated IR. One of the two can be set.
*/
- ir_instruction *ir;
+ const void *ir;
const char *annotation;
/** @} */
};
-class fs_visitor : public ir_visitor
+/**
+ * The fragment shader front-end.
+ *
+ * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
+ */
+class fs_visitor : public backend_visitor
{
public:
- fs_visitor(struct brw_wm_compile *c, struct gl_shader_program *prog,
- struct brw_shader *shader)
- {
- this->c = c;
- this->p = &c->func;
- this->brw = p->brw;
- this->fp = (struct gl_fragment_program *)
- prog->_LinkedShaders[MESA_SHADER_FRAGMENT]->Program;
- this->prog = prog;
- this->intel = &brw->intel;
- this->ctx = &intel->ctx;
- this->mem_ctx = ralloc_context(NULL);
- this->shader = shader;
- this->failed = false;
- this->variable_ht = hash_table_ctor(0,
- hash_table_pointer_hash,
- hash_table_pointer_compare);
-
- /* There's a question that appears to be left open in the spec:
- * How do implicit dst conversions interact with the CMP
- * instruction or conditional mods? On gen6, the instruction:
- *
- * CMP null<d> src0<f> src1<f>
- *
- * will do src1 - src0 and compare that result as if it was an
- * integer. On gen4, it will do src1 - src0 as float, convert
- * the result to int, and compare as int. In between, it
- * appears that it does src1 - src0 and does the compare in the
- * execution type so dst type doesn't matter.
- */
- if (this->intel->gen > 4)
- this->reg_null_cmp = reg_null_d;
- else
- this->reg_null_cmp = reg_null_f;
-
- this->frag_depth = NULL;
- memset(this->outputs, 0, sizeof(this->outputs));
- this->first_non_payload_grf = 0;
- this->max_grf = intel->gen >= 7 ? GEN7_MRF_HACK_START : BRW_MAX_GRF;
-
- this->current_annotation = NULL;
- this->base_ir = NULL;
-
- this->virtual_grf_sizes = NULL;
- this->virtual_grf_next = 0;
- this->virtual_grf_array_size = 0;
- this->virtual_grf_def = NULL;
- this->virtual_grf_use = NULL;
- this->live_intervals_valid = false;
-
- this->kill_emitted = false;
- this->force_uncompressed_stack = 0;
- this->force_sechalf_stack = 0;
- }
-
- ~fs_visitor()
- {
- ralloc_free(this->mem_ctx);
- hash_table_dtor(this->variable_ht);
- }
+ fs_visitor(struct brw_context *brw,
+ struct brw_wm_compile *c,
+ struct gl_shader_program *prog,
+ struct gl_fragment_program *fp,
+ unsigned dispatch_width);
+ ~fs_visitor();
fs_reg *variable_storage(ir_variable *var);
int virtual_grf_alloc(int size);
void swizzle_result(ir_texture *ir, fs_reg orig_val, int sampler);
- fs_inst *emit(fs_inst inst);
-
- fs_inst *emit(enum opcode opcode)
- {
- return emit(fs_inst(opcode));
- }
-
- fs_inst *emit(enum opcode opcode, fs_reg dst)
- {
- return emit(fs_inst(opcode, dst));
- }
-
- fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0)
- {
- return emit(fs_inst(opcode, dst, src0));
- }
+ bool can_do_source_mods(fs_inst *inst);
- fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1)
- {
- return emit(fs_inst(opcode, dst, src0, src1));
- }
+ fs_inst *emit(fs_inst inst);
+ fs_inst *emit(fs_inst *inst);
+ void emit(exec_list list);
+ fs_inst *emit(enum opcode opcode);
+ fs_inst *emit(enum opcode opcode, fs_reg dst);
+ fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0);
+ fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1);
fs_inst *emit(enum opcode opcode, fs_reg dst,
- fs_reg src0, fs_reg src1, fs_reg src2)
- {
- return emit(fs_inst(opcode, dst, src0, src1, src2));
- }
+ fs_reg src0, fs_reg src1, fs_reg src2);
+
+ fs_inst *MOV(fs_reg dst, fs_reg src);
+ fs_inst *NOT(fs_reg dst, fs_reg src);
+ fs_inst *RNDD(fs_reg dst, fs_reg src);
+ fs_inst *RNDE(fs_reg dst, fs_reg src);
+ fs_inst *RNDZ(fs_reg dst, fs_reg src);
+ fs_inst *FRC(fs_reg dst, fs_reg src);
+ fs_inst *ADD(fs_reg dst, fs_reg src0, fs_reg src1);
+ fs_inst *MUL(fs_reg dst, fs_reg src0, fs_reg src1);
+ fs_inst *MACH(fs_reg dst, fs_reg src0, fs_reg src1);
+ fs_inst *MAC(fs_reg dst, fs_reg src0, fs_reg src1);
+ fs_inst *SHL(fs_reg dst, fs_reg src0, fs_reg src1);
+ fs_inst *SHR(fs_reg dst, fs_reg src0, fs_reg src1);
+ fs_inst *ASR(fs_reg dst, fs_reg src0, fs_reg src1);
+ fs_inst *AND(fs_reg dst, fs_reg src0, fs_reg src1);
+ fs_inst *OR(fs_reg dst, fs_reg src0, fs_reg src1);
+ fs_inst *XOR(fs_reg dst, fs_reg src0, fs_reg src1);
+ fs_inst *IF(uint32_t predicate);
+ fs_inst *IF(fs_reg src0, fs_reg src1, uint32_t condition);
+ fs_inst *CMP(fs_reg dst, fs_reg src0, fs_reg src1,
+ uint32_t condition);
int type_size(const struct glsl_type *type);
fs_inst *get_instruction_generating_reg(fs_inst *start,
fs_inst *end,
fs_reg reg);
+ exec_list VARYING_PULL_CONSTANT_LOAD(fs_reg dst, fs_reg surf_index,
+ fs_reg offset);
+
bool run();
- void setup_paramvalues_refs();
+ void setup_payload_gen4();
+ void setup_payload_gen6();
void assign_curb_setup();
void calculate_urb_setup();
void assign_urb_setup();
bool assign_regs();
void assign_regs_trivial();
+ void setup_payload_interference(struct ra_graph *g, int payload_reg_count,
+ int first_payload_node);
+ void setup_mrf_hack_interference(struct ra_graph *g,
+ int first_mrf_hack_node);
int choose_spill_reg(struct ra_graph *g);
void spill_reg(int spill_reg);
void split_virtual_grfs();
+ void compact_virtual_grfs();
+ void move_uniform_array_access_to_pull_constants();
void setup_pull_constants();
void calculate_live_intervals();
- bool propagate_constants();
bool opt_algebraic();
bool opt_cse();
- bool opt_cse_local(fs_bblock *block, exec_list *aeb);
+ bool opt_cse_local(bblock_t *block, exec_list *aeb);
bool opt_copy_propagate();
- bool opt_copy_propagate_local(void *mem_ctx, fs_bblock *block,
- exec_list *acp);
+ bool try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry);
+ bool try_constant_propagate(fs_inst *inst, acp_entry *entry);
+ bool opt_copy_propagate_local(void *mem_ctx, bblock_t *block,
+ exec_list *acp);
bool register_coalesce();
bool register_coalesce_2();
bool compute_to_mrf();
bool remove_dead_constants();
bool remove_duplicate_mrf_writes();
bool virtual_grf_interferes(int a, int b);
- void schedule_instructions();
+ void schedule_instructions(bool post_reg_alloc);
void fail(const char *msg, ...);
void push_force_uncompressed();
void push_force_sechalf();
void pop_force_sechalf();
- void generate_code();
- void generate_fb_write(fs_inst *inst);
- void generate_pixel_xy(struct brw_reg dst, bool is_x);
- void generate_linterp(fs_inst *inst, struct brw_reg dst,
- struct brw_reg *src);
- void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
- void generate_math1_gen7(fs_inst *inst,
- struct brw_reg dst,
- struct brw_reg src);
- void generate_math2_gen7(fs_inst *inst,
- struct brw_reg dst,
- struct brw_reg src0,
- struct brw_reg src1);
- void generate_math1_gen6(fs_inst *inst,
- struct brw_reg dst,
- struct brw_reg src);
- void generate_math2_gen6(fs_inst *inst,
- struct brw_reg dst,
- struct brw_reg src0,
- struct brw_reg src1);
- void generate_math_gen4(fs_inst *inst,
- struct brw_reg dst,
- struct brw_reg src);
- void generate_discard(fs_inst *inst);
- void generate_ddx(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
- void generate_ddy(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
- void generate_spill(fs_inst *inst, struct brw_reg src);
- void generate_unspill(fs_inst *inst, struct brw_reg dst);
- void generate_pull_constant_load(fs_inst *inst, struct brw_reg dst);
-
void emit_dummy_fs();
fs_reg *emit_fragcoord_interpolation(ir_variable *ir);
+ fs_inst *emit_linterp(const fs_reg &attr, const fs_reg &interp,
+ glsl_interp_qualifier interpolation_mode,
+ bool is_centroid);
fs_reg *emit_frontfacing_interpolation(ir_variable *ir);
fs_reg *emit_general_interpolation(ir_variable *ir);
void emit_interpolation_setup_gen4();
void emit_interpolation_setup_gen6();
+ fs_reg rescale_texcoord(ir_texture *ir, fs_reg coordinate,
+ bool is_rect, int sampler, int texunit);
fs_inst *emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate,
- int sampler);
+ fs_reg shadow_comp, fs_reg lod, fs_reg lod2);
fs_inst *emit_texture_gen5(ir_texture *ir, fs_reg dst, fs_reg coordinate,
- int sampler);
+ fs_reg shadow_comp, fs_reg lod, fs_reg lod2);
fs_inst *emit_texture_gen7(ir_texture *ir, fs_reg dst, fs_reg coordinate,
- int sampler);
+ fs_reg shadow_comp, fs_reg lod, fs_reg lod2);
+ fs_reg fix_math_operand(fs_reg src);
fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0);
fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0, fs_reg src1);
+ void emit_minmax(uint32_t conditionalmod, fs_reg dst,
+ fs_reg src0, fs_reg src1);
bool try_emit_saturate(ir_expression *ir);
bool try_emit_mad(ir_expression *ir, int mul_arg);
void emit_bool_to_cond_code(ir_rvalue *condition);
void emit_if_gen6(ir_if *ir);
void emit_unspill(fs_inst *inst, fs_reg reg, uint32_t spill_offset);
+ void emit_fragment_program_code();
+ void setup_fp_regs();
+ fs_reg get_fp_src_reg(const prog_src_register *src);
+ fs_reg get_fp_dst_reg(const prog_dst_register *dst);
+ void emit_fp_alu1(enum opcode opcode,
+ const struct prog_instruction *fpi,
+ fs_reg dst, fs_reg src);
+ void emit_fp_alu2(enum opcode opcode,
+ const struct prog_instruction *fpi,
+ fs_reg dst, fs_reg src0, fs_reg src1);
+ void emit_fp_scalar_write(const struct prog_instruction *fpi,
+ fs_reg dst, fs_reg src);
+ void emit_fp_scalar_math(enum opcode opcode,
+ const struct prog_instruction *fpi,
+ fs_reg dst, fs_reg src);
+
+ void emit_fp_minmax(const struct prog_instruction *fpi,
+ fs_reg dst, fs_reg src0, fs_reg src1);
+
+ void emit_fp_sop(uint32_t conditional_mod,
+ const struct prog_instruction *fpi,
+ fs_reg dst, fs_reg src0, fs_reg src1, fs_reg one);
+
void emit_color_write(int target, int index, int first_color_mrf);
void emit_fb_writes();
+
+ void emit_shader_time_begin();
+ void emit_shader_time_end();
+ void emit_shader_time_write(enum shader_time_shader_type type,
+ fs_reg value);
+
bool try_rewrite_rhs_to_dst(ir_assignment *ir,
fs_reg dst,
fs_reg src,
void resolve_ud_negate(fs_reg *reg);
void resolve_bool_comparison(ir_rvalue *rvalue, fs_reg *reg);
+ fs_reg get_timestamp();
+
struct brw_reg interp_reg(int location, int channel);
- int setup_uniform_values(int loc, const glsl_type *type);
+ void setup_uniform_values(ir_variable *ir);
void setup_builtin_uniform_values(ir_variable *ir);
int implied_mrf_writes(fs_inst *inst);
- struct brw_context *brw;
+ void dump_instructions();
+ void dump_instruction(fs_inst *inst);
+
const struct gl_fragment_program *fp;
- struct intel_context *intel;
- struct gl_context *ctx;
struct brw_wm_compile *c;
- struct brw_compile *p;
- struct brw_shader *shader;
- struct gl_shader_program *prog;
- void *mem_ctx;
- exec_list instructions;
+ unsigned int sanity_param_count;
- /* Delayed setup of c->prog_data.params[] due to realloc of
- * ParamValues[] during compile.
- */
- int param_index[MAX_UNIFORMS * 4];
- int param_offset[MAX_UNIFORMS * 4];
+ int param_size[MAX_UNIFORMS * 4];
int *virtual_grf_sizes;
- int virtual_grf_next;
+ int virtual_grf_count;
int virtual_grf_array_size;
int *virtual_grf_def;
int *virtual_grf_use;
int *params_remap;
struct hash_table *variable_ht;
- ir_variable *frag_depth;
+ fs_reg frag_depth;
fs_reg outputs[BRW_MAX_DRAW_BUFFERS];
+ unsigned output_components[BRW_MAX_DRAW_BUFFERS];
fs_reg dual_src_output;
int first_non_payload_grf;
+ /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
int max_grf;
int urb_setup[FRAG_ATTRIB_MAX];
- bool kill_emitted;
+
+ fs_reg *fp_temp_regs;
+ fs_reg *fp_input_regs;
/** @{ debug annotation info */
const char *current_annotation;
- ir_instruction *base_ir;
+ const void *base_ir;
/** @} */
bool failed;
fs_reg pixel_w;
fs_reg delta_x[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
fs_reg delta_y[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
- fs_reg reg_null_cmp;
+ fs_reg shader_start_time;
int grf_used;
+ const unsigned dispatch_width; /**< 8 or 16 */
+
int force_uncompressed_stack;
int force_sechalf_stack;
+};
+
+/**
+ * The fragment shader code generator.
+ *
+ * Translates FS IR to actual i965 assembly code.
+ */
+class fs_generator
+{
+public:
+ fs_generator(struct brw_context *brw,
+ struct brw_wm_compile *c,
+ struct gl_shader_program *prog,
+ struct gl_fragment_program *fp,
+ bool dual_source_output);
+ ~fs_generator();
+
+ const unsigned *generate_assembly(exec_list *simd8_instructions,
+ exec_list *simd16_instructions,
+ unsigned *assembly_size);
+
+private:
+ void generate_code(exec_list *instructions);
+ void generate_fb_write(fs_inst *inst);
+ void generate_pixel_xy(struct brw_reg dst, bool is_x);
+ void generate_linterp(fs_inst *inst, struct brw_reg dst,
+ struct brw_reg *src);
+ void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
+ void generate_math1_gen7(fs_inst *inst,
+ struct brw_reg dst,
+ struct brw_reg src);
+ void generate_math2_gen7(fs_inst *inst,
+ struct brw_reg dst,
+ struct brw_reg src0,
+ struct brw_reg src1);
+ void generate_math1_gen6(fs_inst *inst,
+ struct brw_reg dst,
+ struct brw_reg src);
+ void generate_math2_gen6(fs_inst *inst,
+ struct brw_reg dst,
+ struct brw_reg src0,
+ struct brw_reg src1);
+ void generate_math_gen4(fs_inst *inst,
+ struct brw_reg dst,
+ struct brw_reg src);
+ void generate_ddx(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
+ void generate_ddy(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
+ bool negate_value);
+ void generate_spill(fs_inst *inst, struct brw_reg src);
+ void generate_unspill(fs_inst *inst, struct brw_reg dst);
+ void generate_uniform_pull_constant_load(fs_inst *inst, struct brw_reg dst,
+ struct brw_reg index,
+ struct brw_reg offset);
+ void generate_uniform_pull_constant_load_gen7(fs_inst *inst,
+ struct brw_reg dst,
+ struct brw_reg surf_index,
+ struct brw_reg offset);
+ void generate_varying_pull_constant_load(fs_inst *inst, struct brw_reg dst,
+ struct brw_reg index);
+ void generate_varying_pull_constant_load_gen7(fs_inst *inst,
+ struct brw_reg dst,
+ struct brw_reg index,
+ struct brw_reg offset);
+ void generate_mov_dispatch_to_flags(fs_inst *inst);
+ void generate_set_global_offset(fs_inst *inst,
+ struct brw_reg dst,
+ struct brw_reg src,
+ struct brw_reg offset);
+ void generate_discard_jump(fs_inst *inst);
+
+ void patch_discard_jumps_to_fb_writes();
+
+ struct brw_context *brw;
+ struct intel_context *intel;
+ struct gl_context *ctx;
+
+ struct brw_compile *p;
+ struct brw_wm_compile *c;
- class fs_bblock *bblock;
+ struct gl_shader_program *prog;
+ struct gl_shader *shader;
+ const struct gl_fragment_program *fp;
+
+ unsigned dispatch_width; /**< 8 or 16 */
+
+ exec_list discard_halt_patches;
+ bool dual_source_output;
+ void *mem_ctx;
};
bool brw_do_channel_expressions(struct exec_list *instructions);
projects / mesa.git / blobdiff