i965: Implement SIMD16 texturing on Gen4.

[mesa.git] / src / mesa / drivers / dri / i965 / brw_fs.h

diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
index ba4417128bed5465695e3201e19e5422c2d732b6..cfdbf555d62c06f50948925b9ab48acaac044b2c 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -52,9 +52,6 @@ extern "C" {
 #include "glsl/nir/nir.h"
 #include "program/sampler.h"
 
-#define MAX_SAMPLER_MESSAGE_SIZE 11
-#define MAX_VGRF_SIZE 16
-
 struct bblock_t;
 namespace {
    struct acp_entry;
@@ -221,6 +218,7 @@ public:
    void calculate_live_intervals();
    void calculate_register_pressure();
    bool opt_algebraic();
+   bool opt_redundant_discard_jumps();
    bool opt_cse();
    bool opt_cse_local(bblock_t *block);
    bool opt_copy_propagate();
@@ -245,6 +243,7 @@ public:
    void no16(const char *msg, ...);
    void lower_uniform_pull_constant_loads();
    bool lower_load_payload();
+   bool opt_combine_constants();
 
    void emit_dummy_fs();
    void emit_repclear_shader();
@@ -261,7 +260,7 @@ public:
                                    glsl_interp_qualifier interpolation_mode,
                                    int location, bool mod_centroid,
                                    bool mod_sample);
-   fs_reg *emit_vs_system_value(enum brw_reg_type type, int location);
+   fs_reg *emit_vs_system_value(int location);
    void emit_interpolation_setup_gen4();
    void emit_interpolation_setup_gen6();
    void compute_sample_position(fs_reg dst, fs_reg int_sample_pos);
@@ -272,6 +271,10 @@ public:
                               fs_reg shadow_comp,
                               fs_reg lod, fs_reg lod2, int grad_components,
                               uint32_t sampler);
+   fs_inst *emit_texture_gen4_simd16(ir_texture_opcode op, fs_reg dst,
+                                     fs_reg coordinate, int vector_elements,
+                                     fs_reg shadow_c, fs_reg lod,
+                                     uint32_t sampler);
    fs_inst *emit_texture_gen5(ir_texture_opcode op, fs_reg dst,
                               fs_reg coordinate, int coord_components,
                               fs_reg shadow_comp,
@@ -290,7 +293,7 @@ public:
                      fs_reg shadow_c,
                      fs_reg lod, fs_reg dpdy, int grad_components,
                      fs_reg sample_index,
-                     fs_reg offset, unsigned offset_components,
+                     fs_reg offset,
                      fs_reg mcs,
                      int gather_component,
                      bool is_cube_array,
@@ -300,22 +303,27 @@ public:
                      int texunit);
    fs_reg emit_mcs_fetch(fs_reg coordinate, int components, fs_reg sampler);
    void emit_gen6_gather_wa(uint8_t wa, fs_reg dst);
+   void resolve_source_modifiers(fs_reg *src);
    fs_reg fix_math_operand(fs_reg src);
    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0);
    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0, fs_reg src1);
-   void emit_lrp(const fs_reg &dst, const fs_reg &x, const fs_reg &y,
-                 const fs_reg &a);
+   fs_inst *emit_lrp(const fs_reg &dst, const fs_reg &x, const fs_reg &y,
+                     const fs_reg &a);
    void emit_minmax(enum brw_conditional_mod conditionalmod, const fs_reg &dst,
                     const fs_reg &src0, const fs_reg &src1);
+   void emit_discard_jump();
+   bool try_emit_b2f_of_comparison(ir_expression *ir);
    bool try_emit_saturate(ir_expression *ir);
    bool try_emit_line(ir_expression *ir);
    bool try_emit_mad(ir_expression *ir);
    bool try_replace_with_sel();
+   bool try_opt_frontfacing_ternary(ir_if *ir);
    bool opt_peephole_sel();
    bool opt_peephole_predicated_break();
    bool opt_saturate_propagation();
    bool opt_cmod_propagation();
    void emit_bool_to_cond_code(ir_rvalue *condition);
+   void emit_bool_to_cond_code_of_reg(ir_expression *expr, fs_reg op[3]);
    void emit_if_gen6(ir_if *ir);
    void emit_unspill(bblock_t *block, fs_inst *inst, fs_reg reg,
                      uint32_t spill_offset, int count);
@@ -366,17 +374,21 @@ public:
    fs_reg get_nir_dest(nir_dest dest);
    void emit_percomp(fs_inst *inst, unsigned wr_mask);
 
-   int setup_color_payload(fs_reg *dst, fs_reg color, unsigned components);
+   bool optimize_frontfacing_ternary(nir_alu_instr *instr,
+                                     const fs_reg &result);
+
+   int setup_color_payload(fs_reg *dst, fs_reg color, unsigned components,
+                           bool use_2nd_half);
    void emit_alpha_test();
    fs_inst *emit_single_fb_write(fs_reg color1, fs_reg color2,
-                                 fs_reg src0_alpha, unsigned components);
+                                 fs_reg src0_alpha, unsigned components,
+                                 bool use_2nd_half = false);
    void emit_fb_writes();
    void emit_urb_writes();
 
    void emit_shader_time_begin();
    void emit_shader_time_end();
-   void emit_shader_time_write(enum shader_time_shader_type type,
-                               fs_reg value);
+   fs_inst *SHADER_TIME_ADD(enum shader_time_shader_type type, fs_reg value);
 
    void emit_untyped_atomic(unsigned atomic_op, unsigned surf_index,
                             fs_reg dst, fs_reg offset, fs_reg src0,
@@ -397,7 +409,7 @@ public:
    void resolve_ud_negate(fs_reg *reg);
    void resolve_bool_comparison(ir_rvalue *rvalue, fs_reg *reg);
 
-   fs_reg get_timestamp();
+   fs_reg get_timestamp(fs_inst **out_mov);
 
    struct brw_reg interp_reg(int location, int channel);
    void setup_uniform_values(ir_variable *ir);
@@ -412,6 +424,8 @@ public:
    void visit_atomic_counter_intrinsic(ir_call *ir);
 
    const void *const key;
+   const struct brw_sampler_prog_key_data *key_tex;
+
    struct brw_stage_prog_data *prog_data;
    unsigned int sanity_param_count;
 
@@ -426,6 +440,9 @@ public:
    /** Number of uniform variable components visited. */
    unsigned uniforms;
 
+   /** Total number of direct uniforms we can get from NIR */
+   unsigned num_direct_uniforms;
+
    /** Byte-offset for the next available spot in the scratch space buffer. */
    unsigned last_scratch;
 
@@ -459,7 +476,6 @@ public:
    fs_reg *nir_globals;
    fs_reg nir_inputs;
    fs_reg nir_outputs;
-   fs_reg nir_uniforms;
    fs_reg *nir_system_values;
 
    /** @{ debug annotation info */
@@ -505,6 +521,8 @@ public:
    bool spilled_any_registers;
 
    const unsigned dispatch_width; /**< 8 or 16 */
+
+   unsigned promoted_constants;
 };
 
 /**
@@ -520,6 +538,7 @@ public:
                 const void *key,
                 struct brw_stage_prog_data *prog_data,
                 struct gl_program *fp,
+                unsigned promoted_constants,
                 bool runtime_check_aads_emit,
                 const char *stage_abbrev);
    ~fs_generator();
@@ -631,6 +650,7 @@ private:
    unsigned dispatch_width; /**< 8 or 16 */
 
    exec_list discard_halt_patches;
+   unsigned promoted_constants;
    bool runtime_check_aads_emit;
    bool debug_flag;
    const char *shader_name;