#include "main/core.h"
#include "brw_wm.h"
}
-#include "../glsl/ir.h"
-#include "../glsl/ir_expression_flattening.h"
-#include "../glsl/glsl_types.h"
+#include "glsl/ir.h"
+#include "glsl/ir_expression_flattening.h"
+#include "glsl/glsl_types.h"
class ir_channel_expressions_visitor : public ir_hierarchical_visitor {
public:
return false;
}
-extern "C" {
-GLboolean
+bool
brw_do_channel_expressions(exec_list *instructions)
{
ir_channel_expressions_visitor v;
return v.progress;
}
-}
ir_rvalue *
ir_channel_expressions_visitor::get_element(ir_variable *var, unsigned int elem)
{
ir_dereference *lhs = ir->lhs->clone(mem_ctx, NULL);
ir_assignment *assign;
- ir_swizzle *val_swiz;
/* This assign-of-expression should have been generated by the
* expression flattening visitor (since we never short circit to
*/
assert(ir->write_mask == (1 << ir->lhs->type->components()) - 1);
- /* Smear the float across all the channels for the masked write. */
- val_swiz = new(mem_ctx) ir_swizzle(val, 0, 0, 0, 0,
- ir->lhs->type->components());
- assign = new(mem_ctx) ir_assignment(lhs, val_swiz, NULL, (1 << elem));
+ assign = new(mem_ctx) ir_assignment(lhs, val, NULL, (1 << elem));
ir->insert_before(assign);
}
ir_expression *expr = ir->rhs->as_expression();
bool found_vector = false;
unsigned int i, vector_elements = 1;
- ir_variable *op_var[2];
+ ir_variable *op_var[3];
if (!expr)
return visit_continue;
if (!this->mem_ctx)
- this->mem_ctx = talloc_parent(ir);
+ this->mem_ctx = ralloc_parent(ir);
for (i = 0; i < expr->get_num_operands(); i++) {
if (expr->operands[i]->type->is_vector()) {
case ir_unop_log:
case ir_unop_exp2:
case ir_unop_log2:
+ case ir_unop_bitcast_i2f:
+ case ir_unop_bitcast_f2i:
+ case ir_unop_bitcast_f2u:
+ case ir_unop_bitcast_u2f:
+ case ir_unop_i2u:
+ case ir_unop_u2i:
case ir_unop_f2i:
+ case ir_unop_f2u:
case ir_unop_i2f:
case ir_unop_f2b:
case ir_unop_b2f:
case ir_unop_ceil:
case ir_unop_floor:
case ir_unop_fract:
+ case ir_unop_round_even:
case ir_unop_sin:
case ir_unop_cos:
+ case ir_unop_sin_reduced:
+ case ir_unop_cos_reduced:
case ir_unop_dFdx:
case ir_unop_dFdy:
+ case ir_unop_bitfield_reverse:
+ case ir_unop_bit_count:
+ case ir_unop_find_msb:
+ case ir_unop_find_lsb:
for (i = 0; i < vector_elements; i++) {
ir_rvalue *op0 = get_element(op_var[0], i);
case ir_binop_bit_and:
case ir_binop_bit_xor:
case ir_binop_bit_or:
+ case ir_binop_less:
+ case ir_binop_greater:
+ case ir_binop_lequal:
+ case ir_binop_gequal:
+ case ir_binop_equal:
+ case ir_binop_nequal:
for (i = 0; i < vector_elements; i++) {
ir_rvalue *op0 = get_element(op_var[0], i);
ir_rvalue *op1 = get_element(op_var[1], i);
break;
}
- case ir_binop_cross: {
- for (i = 0; i < vector_elements; i++) {
- int swiz0 = (i + 1) % 3;
- int swiz1 = (i + 2) % 3;
- ir_expression *temp1, *temp2;
-
- temp1 = new(mem_ctx) ir_expression(ir_binop_mul,
- element_type,
- get_element(op_var[0], swiz0),
- get_element(op_var[1], swiz1));
-
- temp2 = new(mem_ctx) ir_expression(ir_binop_mul,
- element_type,
- get_element(op_var[1], swiz0),
- get_element(op_var[0], swiz1));
-
- temp2 = new(mem_ctx) ir_expression(ir_unop_neg,
- element_type,
- temp2,
- NULL);
-
- assign(ir, i, new(mem_ctx) ir_expression(ir_binop_add,
- element_type,
- temp1, temp2));
- }
- break;
- }
-
- case ir_binop_less:
- case ir_binop_greater:
- case ir_binop_lequal:
- case ir_binop_gequal:
case ir_binop_logic_and:
case ir_binop_logic_xor:
case ir_binop_logic_or:
printf("\n");
assert(!"not reached: expression operates on scalars only");
break;
- case ir_binop_equal:
- case ir_binop_nequal: {
+ case ir_binop_all_equal:
+ case ir_binop_any_nequal: {
ir_expression *last = NULL;
for (i = 0; i < vector_elements; i++) {
ir_rvalue *op0 = get_element(op_var[0], i);
ir_expression *temp;
ir_expression_operation join;
- if (expr->operation == ir_binop_equal)
+ if (expr->operation == ir_binop_all_equal)
join = ir_binop_logic_and;
else
join = ir_binop_logic_or;
case ir_unop_noise:
assert(!"noise should have been broken down to function call");
break;
+
+ case ir_binop_bfm: {
+ /* Does not need to be scalarized, since its result will be identical
+ * for all channels.
+ */
+ ir_rvalue *op0 = get_element(op_var[0], 0);
+ ir_rvalue *op1 = get_element(op_var[1], 0);
+
+ assign(ir, 0, new(mem_ctx) ir_expression(expr->operation,
+ element_type,
+ op0,
+ op1));
+ break;
+ }
+
+ case ir_binop_ubo_load:
+ assert(!"not yet supported");
+ break;
+
+ case ir_triop_lrp:
+ case ir_triop_bitfield_extract:
+ for (i = 0; i < vector_elements; i++) {
+ ir_rvalue *op0 = get_element(op_var[0], i);
+ ir_rvalue *op1 = get_element(op_var[1], i);
+ ir_rvalue *op2 = get_element(op_var[2], i);
+
+ assign(ir, i, new(mem_ctx) ir_expression(expr->operation,
+ element_type,
+ op0,
+ op1,
+ op2));
+ }
+ break;
+
+ case ir_triop_bfi: {
+ /* Only a single BFM is needed for multiple BFIs. */
+ ir_rvalue *op0 = get_element(op_var[0], 0);
+
+ for (i = 0; i < vector_elements; i++) {
+ ir_rvalue *op1 = get_element(op_var[1], i);
+ ir_rvalue *op2 = get_element(op_var[2], i);
+
+ assign(ir, i, new(mem_ctx) ir_expression(expr->operation,
+ element_type,
+ op0->clone(mem_ctx, NULL),
+ op1,
+ op2));
+ }
+ break;
+ }
+
+ case ir_unop_pack_snorm_2x16:
+ case ir_unop_pack_snorm_4x8:
+ case ir_unop_pack_unorm_2x16:
+ case ir_unop_pack_unorm_4x8:
+ case ir_unop_pack_half_2x16:
+ case ir_unop_unpack_snorm_2x16:
+ case ir_unop_unpack_snorm_4x8:
+ case ir_unop_unpack_unorm_2x16:
+ case ir_unop_unpack_unorm_4x8:
+ case ir_unop_unpack_half_2x16:
+ case ir_binop_vector_extract:
+ case ir_quadop_bitfield_insert:
+ case ir_quadop_vector:
+ assert(!"should have been lowered");
+ break;
+
+ case ir_unop_unpack_half_2x16_split_x:
+ case ir_unop_unpack_half_2x16_split_y:
+ case ir_binop_pack_half_2x16_split:
+ assert("!not reached: expression operates on scalars only");
+ break;
}
ir->remove();
projects / mesa.git / blobdiff