opcode == BRW_OPCODE_NOT);
}
+static bool
+can_change_source_types(fs_inst *inst)
+{
+ return !inst->src[0].abs && !inst->src[0].negate &&
+ (inst->opcode == BRW_OPCODE_MOV ||
+ (inst->opcode == BRW_OPCODE_SEL &&
+ inst->predicate != BRW_PREDICATE_NONE &&
+ !inst->src[1].abs && !inst->src[1].negate));
+}
+
bool
fs_visitor::try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry)
{
if (entry->src.file == IMM)
return false;
- assert(entry->src.file == GRF || entry->src.file == UNIFORM);
+ assert(entry->src.file == GRF || entry->src.file == UNIFORM ||
+ entry->src.file == ATTR);
if (entry->opcode == SHADER_OPCODE_LOAD_PAYLOAD &&
inst->opcode == SHADER_OPCODE_LOAD_PAYLOAD)
* instead. See also resolve_ud_negate() and comment in
* fs_generator::generate_code.
*/
- if (inst->src[arg].type == BRW_REGISTER_TYPE_UD &&
+ if (entry->src.type == BRW_REGISTER_TYPE_UD &&
entry->src.negate)
return false;
if ((has_source_modifiers || entry->src.file == UNIFORM ||
!entry->src.is_contiguous()) &&
- !inst->can_do_source_mods(brw))
+ !inst->can_do_source_mods(devinfo))
return false;
if (has_source_modifiers &&
if (entry->src.stride * inst->src[arg].stride > 4)
return false;
+ /* Bail if the instruction type is larger than the execution type of the
+ * copy, what implies that each channel is reading multiple channels of the
+ * destination of the copy, and simply replacing the sources would give a
+ * program with different semantics.
+ */
+ if (type_sz(entry->dst.type) < type_sz(inst->src[arg].type))
+ return false;
+
/* Bail if the result of composing both strides cannot be expressed
* as another stride. This avoids, for example, trying to transform
* this:
type_sz(inst->src[arg].type)) % type_sz(entry->src.type) != 0)
return false;
- if (has_source_modifiers && entry->dst.type != inst->src[arg].type)
+ if (has_source_modifiers &&
+ entry->dst.type != inst->src[arg].type &&
+ !can_change_source_types(inst))
return false;
- if (brw->gen >= 8 && (entry->src.negate || entry->src.abs) &&
+ if (devinfo->gen >= 8 && (entry->src.negate || entry->src.abs) &&
is_logic_op(inst->opcode)) {
return false;
}
switch (entry->src.file) {
case UNIFORM:
- assert(entry->src.width == 1);
case BAD_FILE:
case HW_REG:
- inst->src[arg].width = entry->src.width;
inst->src[arg].reg_offset = entry->src.reg_offset;
inst->src[arg].subreg_offset = entry->src.subreg_offset;
break;
+ case ATTR:
case GRF:
{
- assert(entry->src.width % inst->src[arg].width == 0);
/* In this case, we'll just leave the width alone. The source
* register could have different widths depending on how it is
* being used. For instance, if only half of the register was
break;
}
- if (!inst->src[arg].abs) {
- inst->src[arg].abs = entry->src.abs;
- inst->src[arg].negate ^= entry->src.negate;
+ if (has_source_modifiers) {
+ if (entry->dst.type != inst->src[arg].type) {
+ /* We are propagating source modifiers from a MOV with a different
+ * type. If we got here, then we can just change the source and
+ * destination types of the instruction and keep going.
+ */
+ assert(can_change_source_types(inst));
+ for (int i = 0; i < inst->sources; i++) {
+ inst->src[i].type = entry->dst.type;
+ }
+ inst->dst.type = entry->dst.type;
+ }
+
+ if (!inst->src[arg].abs) {
+ inst->src[arg].abs = entry->src.abs;
+ inst->src[arg].negate ^= entry->src.negate;
+ }
}
return true;
continue;
fs_reg val = entry->src;
- val.effective_width = inst->src[i].effective_width;
val.type = inst->src[i].type;
if (inst->src[i].abs) {
- if ((brw->gen >= 8 && is_logic_op(inst->opcode)) ||
+ if ((devinfo->gen >= 8 && is_logic_op(inst->opcode)) ||
!brw_abs_immediate(val.type, &val.fixed_hw_reg)) {
continue;
}
}
if (inst->src[i].negate) {
- if ((brw->gen >= 8 && is_logic_op(inst->opcode)) ||
+ if ((devinfo->gen >= 8 && is_logic_op(inst->opcode)) ||
!brw_negate_immediate(val.type, &val.fixed_hw_reg)) {
continue;
}
progress = true;
break;
- case SHADER_OPCODE_POW:
case SHADER_OPCODE_INT_QUOTIENT:
case SHADER_OPCODE_INT_REMAINDER:
- if (brw->gen < 8)
+ /* FINISHME: Promote non-float constants and remove this. */
+ if (devinfo->gen < 8)
+ break;
+ /* fallthrough */
+ case SHADER_OPCODE_POW:
+ /* Allow constant propagation into src1 (except on Gen 6), and let
+ * constant combining promote the constant on Gen < 8.
+ *
+ * While Gen 6 MATH can take a scalar source, its source and
+ * destination offsets must be equal and we cannot ensure that.
+ */
+ if (devinfo->gen == 6)
break;
/* fallthrough */
case BRW_OPCODE_BFI1:
case BRW_OPCODE_MACH:
case BRW_OPCODE_MUL:
+ case SHADER_OPCODE_MULH:
case BRW_OPCODE_ADD:
case BRW_OPCODE_OR:
case BRW_OPCODE_AND:
/* Fit this constant in by commuting the operands.
* Exception: we can't do this for 32-bit integer MUL/MACH
* because it's asymmetric.
+ *
+ * The BSpec says for Broadwell that
+ *
+ * "When multiplying DW x DW, the dst cannot be accumulator."
+ *
+ * Integer MUL with a non-accumulator destination will be lowered
+ * by lower_integer_multiplication(), so don't restrict it.
*/
- if ((inst->opcode == BRW_OPCODE_MUL ||
+ if (((inst->opcode == BRW_OPCODE_MUL &&
+ inst->dst.is_accumulator()) ||
inst->opcode == BRW_OPCODE_MACH) &&
(inst->src[1].type == BRW_REGISTER_TYPE_D ||
inst->src[1].type == BRW_REGISTER_TYPE_UD))
break;
case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD:
+ case SHADER_OPCODE_BROADCAST:
inst->src[i] = val;
progress = true;
break;
((inst->src[0].file == GRF &&
(inst->src[0].reg != inst->dst.reg ||
inst->src[0].reg_offset != inst->dst.reg_offset)) ||
+ inst->src[0].file == ATTR ||
inst->src[0].file == UNIFORM ||
inst->src[0].file == IMM) &&
inst->src[0].type == inst->dst.type &&
inst->dst.file == GRF) {
int offset = 0;
for (int i = 0; i < inst->sources; i++) {
- int regs_written = ((inst->src[i].effective_width *
- type_sz(inst->src[i].type)) + 31) / 32;
+ int effective_width = i < inst->header_size ? 8 : inst->exec_size;
+ int regs_written = effective_width / 8;
if (inst->src[i].file == GRF) {
acp_entry *entry = ralloc(copy_prop_ctx, acp_entry);
entry->dst = inst->dst;
entry->dst.reg_offset = offset;
- entry->dst.width = inst->src[i].effective_width;
entry->src = inst->src[i];
entry->regs_written = regs_written;
entry->opcode = inst->opcode;
projects / mesa.git / blobdiff