i965/nir: Sort uniforms direct-first and use two different uniform registers
[mesa.git] / src / mesa / drivers / dri / i965 / brw_fs_cse.cpp
index 033c09e0f850602888bb3868c10bf3486bd2d156..ca5b32f43017ecb7b9a1117fa038c930ae742511 100644 (file)
@@ -62,6 +62,7 @@ static bool
 is_expression(const fs_inst *const inst)
 {
    switch (inst->opcode) {
+   case BRW_OPCODE_MOV:
    case BRW_OPCODE_SEL:
    case BRW_OPCODE_NOT:
    case BRW_OPCODE_AND:
@@ -99,7 +100,7 @@ is_expression(const fs_inst *const inst)
    case SHADER_OPCODE_INT_REMAINDER:
    case SHADER_OPCODE_SIN:
    case SHADER_OPCODE_COS:
-      return inst->mlen == 0;
+      return inst->mlen < 2;
    case SHADER_OPCODE_LOAD_PAYLOAD:
       return !is_copy_payload(inst);
    default:
@@ -108,27 +109,16 @@ is_expression(const fs_inst *const inst)
 }
 
 static bool
-is_expression_commutative(enum opcode op)
-{
-   switch (op) {
-   case BRW_OPCODE_AND:
-   case BRW_OPCODE_OR:
-   case BRW_OPCODE_XOR:
-   case BRW_OPCODE_ADD:
-   case BRW_OPCODE_MUL:
-      return true;
-   default:
-      return false;
-   }
-}
-
-static bool
-operands_match(fs_inst *a, fs_inst *b)
+operands_match(const fs_inst *a, const fs_inst *b)
 {
    fs_reg *xs = a->src;
    fs_reg *ys = b->src;
 
-   if (!is_expression_commutative(a->opcode)) {
+   if (a->opcode == BRW_OPCODE_MAD) {
+      return xs[0].equals(ys[0]) &&
+             ((xs[1].equals(ys[1]) && xs[2].equals(ys[2])) ||
+              (xs[2].equals(ys[1]) && xs[1].equals(ys[2])));
+   } else if (!a->is_commutative()) {
       bool match = true;
       for (int i = 0; i < a->sources; i++) {
          if (!xs[i].equals(ys[i])) {
@@ -153,7 +143,7 @@ instructions_match(fs_inst *a, fs_inst *b)
           a->conditional_mod == b->conditional_mod &&
           a->dst.type == b->dst.type &&
           a->sources == b->sources &&
-          (a->is_tex() ? (a->texture_offset == b->texture_offset &&
+          (a->is_tex() ? (a->offset == b->offset &&
                           a->mlen == b->mlen &&
                           a->regs_written == b->regs_written &&
                           a->base_mrf == b->base_mrf &&
@@ -182,7 +172,8 @@ fs_visitor::opt_cse_local(bblock_t *block)
 
          foreach_in_list_use_after(aeb_entry, entry, &aeb) {
             /* Match current instruction's expression against those in AEB. */
-            if (instructions_match(inst, entry->generator)) {
+            if (!(entry->generator->dst.is_null() && !inst->dst.is_null()) &&
+                instructions_match(inst, entry->generator)) {
                found = true;
                progress = true;
                break;
@@ -190,11 +181,16 @@ fs_visitor::opt_cse_local(bblock_t *block)
          }
 
          if (!found) {
-            /* Our first sighting of this expression.  Create an entry. */
-            aeb_entry *entry = ralloc(cse_ctx, aeb_entry);
-            entry->tmp = reg_undef;
-            entry->generator = inst;
-            aeb.push_tail(entry);
+            if (inst->opcode != BRW_OPCODE_MOV ||
+                (inst->opcode == BRW_OPCODE_MOV &&
+                 inst->src[0].file == IMM &&
+                 inst->src[0].type == BRW_REGISTER_TYPE_VF)) {
+               /* Our first sighting of this expression.  Create an entry. */
+               aeb_entry *entry = ralloc(cse_ctx, aeb_entry);
+               entry->tmp = reg_undef;
+               entry->generator = inst;
+               aeb.push_tail(entry);
+            }
          } else {
             /* This is at least our second sighting of this expression.
              * If we don't have a temporary already, make one.
@@ -202,49 +198,49 @@ fs_visitor::opt_cse_local(bblock_t *block)
             bool no_existing_temp = entry->tmp.file == BAD_FILE;
             if (no_existing_temp && !entry->generator->dst.is_null()) {
                int written = entry->generator->regs_written;
+               int dst_width = entry->generator->dst.width / 8;
+               assert(written % dst_width == 0);
 
                fs_reg orig_dst = entry->generator->dst;
-               fs_reg tmp = fs_reg(GRF, virtual_grf_alloc(written),
-                                   orig_dst.type);
+               fs_reg tmp = fs_reg(GRF, alloc.allocate(written),
+                                   orig_dst.type, orig_dst.width);
                entry->tmp = tmp;
                entry->generator->dst = tmp;
 
                fs_inst *copy;
-               if (written > 1) {
-                  fs_reg *sources = ralloc_array(mem_ctx, fs_reg, written);
-                  for (int i = 0; i < written; i++) {
-                     sources[i] = tmp;
-                     sources[i].reg_offset = i;
-                  }
-                  copy = LOAD_PAYLOAD(orig_dst, sources, written);
+               if (written > dst_width) {
+                  fs_reg *sources = ralloc_array(mem_ctx, fs_reg, written / dst_width);
+                  for (int i = 0; i < written / dst_width; i++)
+                     sources[i] = offset(tmp, i);
+                  copy = LOAD_PAYLOAD(orig_dst, sources, written / dst_width);
                } else {
                   copy = MOV(orig_dst, tmp);
                   copy->force_writemask_all =
                      entry->generator->force_writemask_all;
                }
-               entry->generator->insert_after(copy);
+               entry->generator->insert_after(block, copy);
             }
 
             /* dest <- temp */
             if (!inst->dst.is_null()) {
                int written = inst->regs_written;
+               int dst_width = inst->dst.width / 8;
                assert(written == entry->generator->regs_written);
+               assert(dst_width == entry->generator->dst.width / 8);
                assert(inst->dst.type == entry->tmp.type);
                fs_reg dst = inst->dst;
                fs_reg tmp = entry->tmp;
                fs_inst *copy;
-               if (written > 1) {
-                  fs_reg *sources = ralloc_array(mem_ctx, fs_reg, written);
-                  for (int i = 0; i < written; i++) {
-                     sources[i] = tmp;
-                     sources[i].reg_offset = i;
-                  }
-                  copy = LOAD_PAYLOAD(dst, sources, written);
+               if (written > dst_width) {
+                  fs_reg *sources = ralloc_array(mem_ctx, fs_reg, written / dst_width);
+                  for (int i = 0; i < written / dst_width; i++)
+                     sources[i] = offset(tmp, i);
+                  copy = LOAD_PAYLOAD(dst, sources, written / dst_width);
                } else {
                   copy = MOV(dst, tmp);
                   copy->force_writemask_all = inst->force_writemask_all;
                }
-               inst->insert_before(copy);
+               inst->insert_before(block, copy);
             }
 
             /* Set our iterator so that next time through the loop inst->next
@@ -253,13 +249,7 @@ fs_visitor::opt_cse_local(bblock_t *block)
              */
             fs_inst *prev = (fs_inst *)inst->prev;
 
-            inst->remove();
-
-            /* Appending an instruction may have changed our bblock end. */
-            if (inst == block->end) {
-               block->end = prev;
-            }
-
+            inst->remove(block);
             inst = prev;
          }
       }
@@ -316,9 +306,7 @@ fs_visitor::opt_cse()
 
    calculate_live_intervals();
 
-   for (int b = 0; b < cfg->num_blocks; b++) {
-      bblock_t *block = cfg->blocks[b];
-
+   foreach_block (block, cfg) {
       progress = opt_cse_local(block) || progress;
    }