i965/gs: Add a case to brwNewProgram() for geometry shaders.

[mesa.git] / src / mesa / drivers / dri / i965 / brw_fs_fp.cpp

diff --git a/src/mesa/drivers/dri/i965/brw_fs_fp.cpp b/src/mesa/drivers/dri/i965/brw_fs_fp.cpp
index 542d80a6b4026d423584794d4f8b785209a7c089..68531e3b2fa27f0bce32e516a1820005b12f7829 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs_fp.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_fp.cpp
@@ -252,14 +252,15 @@ fs_visitor::emit_fragment_program_code()
                continue;
             }
 
-            emit(CMP(null, regoffset(src[0], i), fs_reg(0.0f),
-                     BRW_CONDITIONAL_L));
-
-            if (intel->gen < 6 && dispatch_width == 16)
-               fail("Can't support (non-uniform) control flow on 16-wide");
-            emit(IF(BRW_PREDICATE_NORMAL));
-            emit(FS_OPCODE_DISCARD);
-            emit(BRW_OPCODE_ENDIF);
+
+            /* Emit an instruction that's predicated on the current
+             * undiscarded pixels, and updates just those pixels to be
+             * turned off.
+             */
+            fs_inst *cmp = emit(CMP(null, regoffset(src[0], i), fs_reg(0.0f),
+                                    BRW_CONDITIONAL_GE));
+            cmp->predicate = BRW_PREDICATE_NORMAL;
+            cmp->flag_subreg = 1;
          }
          break;
       }
@@ -315,14 +316,10 @@ fs_visitor::emit_fragment_program_code()
       case OPCODE_LRP:
          for (int i = 0; i < 4; i++) {
             if (fpi->DstReg.WriteMask & (1 << i)) {
-               fs_reg neg_src0 = regoffset(src[0], i);
-               neg_src0.negate = !neg_src0.negate;
-               fs_reg temp = fs_reg(this, glsl_type::float_type);
-               fs_reg temp2 = fs_reg(this, glsl_type::float_type);
-               emit(ADD(temp, neg_src0, fs_reg(1.0f)));
-               emit(MUL(temp, temp, regoffset(src[2], i)));
-               emit(MUL(temp2, regoffset(src[0], i), regoffset(src[1], i)));
-               emit(ADD(regoffset(dst, i), temp, temp2));
+               fs_reg a = regoffset(src[0], i);
+               fs_reg y = regoffset(src[1], i);
+               fs_reg x = regoffset(src[2], i);
+               emit_lrp(regoffset(dst, i), x, y, a);
             }
          }
          break;
@@ -415,6 +412,7 @@ fs_visitor::emit_fragment_program_code()
          fs_reg dpdy;
          fs_reg coordinate = src[0];
          fs_reg shadow_c;
+         fs_reg sample_index;
 
          switch (fpi->Opcode) {
          case OPCODE_TEX:
@@ -441,6 +439,8 @@ fs_visitor::emit_fragment_program_code()
             break;
          }
 
+         ir->type = glsl_type::vec4_type;
+
          const glsl_type *coordinate_type;
          switch (fpi->TexSrcTarget) {
          case TEXTURE_1D_INDEX:
@@ -500,10 +500,10 @@ fs_visitor::emit_fragment_program_code()
          }
 
          fs_inst *inst;
-         if (intel->gen >= 7) {
-            inst = emit_texture_gen7(ir, dst, coordinate, shadow_c, lod, dpdy);
-         } else if (intel->gen >= 5) {
-            inst = emit_texture_gen5(ir, dst, coordinate, shadow_c, lod, dpdy);
+         if (brw->gen >= 7) {
+            inst = emit_texture_gen7(ir, dst, coordinate, shadow_c, lod, dpdy, sample_index);
+         } else if (brw->gen >= 5) {
+            inst = emit_texture_gen5(ir, dst, coordinate, shadow_c, lod, dpdy, sample_index);
          } else {
             inst = emit_texture_gen4(ir, dst, coordinate, shadow_c, lod, dpdy);
          }
@@ -591,42 +591,41 @@ fs_visitor::setup_fp_regs()
    /* PROGRAM_STATE_VAR etc. */
    if (dispatch_width == 8) {
       for (unsigned p = 0;
-           p < c->fp->program.Base.Parameters->NumParameters; p++) {
+           p < fp->Base.Parameters->NumParameters; p++) {
          for (unsigned int i = 0; i < 4; i++) {
-            this->param_index[c->prog_data.nr_params] = p;
-            this->param_offset[c->prog_data.nr_params] = i;
-            c->prog_data.nr_params++;
+            c->prog_data.param[c->prog_data.nr_params++] =
+               &fp->Base.Parameters->ParameterValues[p][i].f;
          }
       }
    }
 
-   fp_input_regs = rzalloc_array(mem_ctx, fs_reg, FRAG_ATTRIB_MAX);
-   for (int i = 0; i < FRAG_ATTRIB_MAX; i++) {
+   fp_input_regs = rzalloc_array(mem_ctx, fs_reg, VARYING_SLOT_MAX);
+   for (int i = 0; i < VARYING_SLOT_MAX; i++) {
       if (fp->Base.InputsRead & BITFIELD64_BIT(i)) {
          /* Make up a dummy instruction to reuse code for emitting
           * interpolation.
           */
          ir_variable *ir = new(mem_ctx) ir_variable(glsl_type::vec4_type,
                                                     "fp_input",
-                                                    ir_var_in);
+                                                    ir_var_shader_in);
          ir->location = i;
 
          this->current_annotation = ralloc_asprintf(ctx, "interpolate input %d",
                                                     i);
 
          switch (i) {
-         case FRAG_ATTRIB_WPOS:
+         case VARYING_SLOT_POS:
             ir->pixel_center_integer = fp->PixelCenterInteger;
             ir->origin_upper_left = fp->OriginUpperLeft;
             fp_input_regs[i] = *emit_fragcoord_interpolation(ir);
             break;
-         case FRAG_ATTRIB_FACE:
+         case VARYING_SLOT_FACE:
             fp_input_regs[i] = *emit_frontfacing_interpolation(ir);
             break;
          default:
             fp_input_regs[i] = *emit_general_interpolation(ir);
 
-            if (i == FRAG_ATTRIB_FOGC) {
+            if (i == VARYING_SLOT_FOGC) {
                emit(MOV(regoffset(fp_input_regs[i], 1), fs_reg(0.0f)));
                emit(MOV(regoffset(fp_input_regs[i], 2), fs_reg(0.0f)));
                emit(MOV(regoffset(fp_input_regs[i], 3), fs_reg(1.0f)));
@@ -688,7 +687,7 @@ fs_visitor::get_fp_dst_reg(const prog_dst_register *dst)
 fs_reg
 fs_visitor::get_fp_src_reg(const prog_src_register *src)
 {
-   struct gl_program_parameter_list *plist = c->fp->program.Base.Parameters;
+   struct gl_program_parameter_list *plist = fp->Base.Parameters;
 
    fs_reg result;