static struct brw_reg
brw_reg_from_fs_reg(fs_inst *inst, fs_reg *reg, unsigned gen, bool compressed)
{
- assert(reg->offset / REG_SIZE == 0);
struct brw_reg brw_reg;
switch (reg->file) {
}
brw_reg = retype(brw_reg, reg->type);
- brw_reg = byte_offset(brw_reg, reg->subreg_offset);
+ brw_reg = byte_offset(brw_reg, reg->offset);
brw_reg.abs = reg->abs;
brw_reg.negate = reg->negate;
break;
case ARF:
case FIXED_GRF:
case IMM:
- assert(reg->subreg_offset == 0);
+ assert(reg->offset == 0);
brw_reg = reg->as_brw_reg();
break;
case BAD_FILE:
fs_generator::generate_fb_read(fs_inst *inst, struct brw_reg dst,
struct brw_reg payload)
{
+ assert(inst->size_written % REG_SIZE == 0);
brw_wm_prog_data *prog_data =
reinterpret_cast<brw_wm_prog_data *>(this->prog_data);
const unsigned surf_index =
prog_data->binding_table.render_target_start + inst->target;
gen9_fb_READ(p, dst, payload, surf_index,
- inst->header_size, inst->regs_written,
+ inst->header_size, inst->size_written / REG_SIZE,
prog_data->persample_dispatch);
brw_mark_surface_used(&prog_data->base, surf_index);
struct brw_reg dst,
struct brw_reg header)
{
+ assert(inst->size_written % REG_SIZE == 0);
assert(header.file == BRW_GENERAL_REGISTER_FILE);
assert(header.type == BRW_REGISTER_TYPE_UD);
brw_inst_set_urb_per_slot_offset(p->devinfo, send, true);
brw_inst_set_mlen(p->devinfo, send, inst->mlen);
- brw_inst_set_rlen(p->devinfo, send, inst->regs_written);
+ brw_inst_set_rlen(p->devinfo, send, inst->size_written / REG_SIZE);
brw_inst_set_header_present(p->devinfo, send, true);
brw_inst_set_urb_global_offset(p->devinfo, send, inst->offset);
}
struct brw_reg surface_index,
struct brw_reg sampler_index)
{
+ assert(inst->size_written % REG_SIZE == 0);
int msg_type = -1;
uint32_t simd_mode;
uint32_t return_format;
surface + base_binding_table_index,
sampler % 16,
msg_type,
- inst->regs_written,
+ inst->size_written / REG_SIZE,
inst->mlen,
inst->header_size != 0,
simd_mode,
0 /* surface */,
0 /* sampler */,
msg_type,
- inst->regs_written,
+ inst->size_written / REG_SIZE,
inst->mlen /* mlen */,
inst->header_size != 0 /* header */,
simd_mode,
*/
msg_type = BRW_SAMPLER_MESSAGE_SIMD16_LD;
assert(inst->mlen == 3);
- assert(inst->regs_written == 8);
+ assert(inst->size_written == 8 * REG_SIZE);
rlen = 8;
simd_mode = BRW_SAMPLER_SIMD_MODE_SIMD16;
}
struct brw_reg msg_data,
unsigned msg_type)
{
+ assert(inst->size_written % REG_SIZE == 0);
assert(msg_data.type == BRW_REGISTER_TYPE_UD);
brw_pixel_interpolator_query(p,
msg_type,
msg_data,
inst->mlen,
- inst->regs_written);
+ inst->size_written / REG_SIZE);
}
generate_set_simd4x2_offset(inst, dst, src[0]);
break;
- case SHADER_OPCODE_FIND_LIVE_CHANNEL:
- brw_find_live_channel(p, dst);
+ case SHADER_OPCODE_FIND_LIVE_CHANNEL: {
+ const struct brw_reg mask =
+ brw_stage_has_packed_dispatch(devinfo, stage,
+ prog_data) ? brw_imm_ud(~0u) :
+ stage == MESA_SHADER_FRAGMENT ? brw_vmask_reg() :
+ brw_dmask_reg();
+ brw_find_live_channel(p, dst, mask);
break;
+ }
case SHADER_OPCODE_BROADCAST:
assert(inst->force_writemask_all);