i965: correct mt->align_h for 2D textures on Skylake

[mesa.git] / src / mesa / drivers / dri / i965 / brw_fs_live_variables.h

diff --git a/src/mesa/drivers/dri/i965/brw_fs_live_variables.h b/src/mesa/drivers/dri/i965/brw_fs_live_variables.h
index 2bfb583233ea3c23f061bcae2b7294d809c265d1..c7457069edec6ccb013fe9a027caaf985eb9d8ef 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs_live_variables.h
+++ b/src/mesa/drivers/dri/i965/brw_fs_live_variables.h
@@ -26,7 +26,7 @@
  */
 
 #include "brw_fs.h"
-#include "main/bitset.h"
+#include "util/bitset.h"
 
 struct cfg_t;
 
@@ -66,7 +66,10 @@ public:
    ~fs_live_variables();
 
    bool vars_interfere(int a, int b);
-   int var_from_reg(fs_reg *reg);
+   int var_from_reg(const fs_reg &reg) const
+   {
+      return var_from_vgrf[reg.reg] + reg.reg_offset;
+   }
 
    /** Map from virtual GRF number to index in block_data arrays. */
    int *var_from_vgrf;
@@ -74,7 +77,7 @@ public:
    /**
     * Map from any index in block_data to the virtual GRF containing it.
     *
-    * For virtual_grf_sizes of [1, 2, 3], vgrf_from_var would contain
+    * For alloc.sizes of [1, 2, 3], vgrf_from_var would contain
     * [0, 1, 1, 2, 2, 2].
     */
    int *vgrf_from_var;
@@ -96,8 +99,10 @@ public:
 
 protected:
    void setup_def_use();
-   void setup_one_read(struct block_data *bd, fs_inst *inst, int ip, fs_reg reg);
-   void setup_one_write(struct block_data *bd, fs_inst *inst, int ip, fs_reg reg);
+   void setup_one_read(struct block_data *bd, fs_inst *inst, int ip,
+                       const fs_reg &reg);
+   void setup_one_write(struct block_data *bd, fs_inst *inst, int ip,
+                        const fs_reg &reg);
    void compute_live_variables();
    void compute_start_end();