i965/vec4: Assign correct destination offset to rewritten instruction in register...

[mesa.git] / src / mesa / drivers / dri / i965 / brw_fs_surface_builder.cpp

diff --git a/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp b/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
index 5fa7c42d2ee2b0d12adec087e6608491ef1700e7..8990a5ca71019d9fa77fc7ffde106028a3948ddf 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
@@ -50,7 +50,7 @@ namespace brw {
             const fs_reg dst = bld.vgrf(BRW_REGISTER_TYPE_UD, rsize);
             fs_inst *inst = bld.emit(opcode, dst, srcs, ARRAY_SIZE(srcs));
 
-            inst->regs_written = rsize * bld.dispatch_width() / 8;
+            inst->size_written = rsize * dst.component_size(inst->exec_size);
             inst->predicate = pred;
             return dst;
          }