i965/fs: Lower 32x32 bit multiplication on BXT.

[mesa.git] / src / mesa / drivers / dri / i965 / brw_gs.c

diff --git a/src/mesa/drivers/dri/i965/brw_gs.c b/src/mesa/drivers/dri/i965/brw_gs.c
index bea90d8d607fec12992af7a03044c3599b50c6a4..9c59c8a0dfc04210a8fa7b90528eb14ce5961068 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_gs.c
+++ b/src/mesa/drivers/dri/i965/brw_gs.c
@@ -35,7 +35,7 @@
 
 
 bool
-brw_compile_gs_prog(struct brw_context *brw,
+brw_codegen_gs_prog(struct brw_context *brw,
                     struct gl_shader_program *prog,
                     struct brw_geometry_program *gp,
                     struct brw_gs_prog_key *key)
@@ -126,7 +126,8 @@ brw_compile_gs_prog(struct brw_context *brw,
       outputs_written |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST1);
    }
 
-   brw_compute_vue_map(brw, &c.prog_data.base.vue_map, outputs_written);
+   brw_compute_vue_map(brw->intelScreen->devinfo,
+                       &c.prog_data.base.vue_map, outputs_written);
 
    /* Compute the output vertex size.
     *
@@ -248,7 +249,8 @@ brw_compile_gs_prog(struct brw_context *brw,
    c.prog_data.output_topology =
       get_hw_prim_for_gl_prim(gp->program.OutputType);
 
-   brw_compute_vue_map(brw, &c.input_vue_map, c.key.input_varyings);
+   brw_compute_vue_map(brw->intelScreen->devinfo,
+                       &c.input_vue_map, c.key.input_varyings);
 
    /* GS inputs are read from the VUE 256 bits (2 vec4's) at a time, so we
     * need to program a URB read length of ceiling(num_slots / 2).
@@ -265,14 +267,7 @@ brw_compile_gs_prog(struct brw_context *brw,
    }
 
    /* Scratch space is used for register spilling */
-   if (c.base.last_scratch) {
-      perf_debug("Geometry shader triggered register spilling.  "
-                 "Try reducing the number of live vec4 values to "
-                 "improve performance.\n");
-
-      c.prog_data.base.base.total_scratch
-         = brw_get_scratch_size(c.base.last_scratch*REG_SIZE);
-
+   if (c.prog_data.base.base.total_scratch) {
       brw_get_scratch_bo(brw, &stage_state->scratch_bo,
                         c.prog_data.base.base.total_scratch *
                          brw->max_gs_threads);
@@ -363,7 +358,7 @@ brw_upload_gs_prog(struct brw_context *brw)
    if (!brw_search_cache(&brw->cache, BRW_CACHE_GS_PROG,
                          &key, sizeof(key),
                          &stage_state->prog_offset, &brw->gs.prog_data)) {
-      bool success = brw_compile_gs_prog(brw, current[MESA_SHADER_GEOMETRY],
+      bool success = brw_codegen_gs_prog(brw, current[MESA_SHADER_GEOMETRY],
                                          gp, &key);
       assert(success);
       (void)success;
@@ -400,7 +395,7 @@ brw_gs_precompile(struct gl_context *ctx,
     */
    key.input_varyings = gp->Base.InputsRead;
 
-   success = brw_compile_gs_prog(brw, shader_prog, bgp, &key);
+   success = brw_codegen_gs_prog(brw, shader_prog, bgp, &key);
 
    brw->gs.base.prog_offset = old_prog_offset;
    brw->gs.prog_data = old_prog_data;