i965/vec4: Make with_writemask() non-static.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_gs_state.c
index e0309e71fc3df27c6f593495f8e6956a514cc96b..98dc955f005038bee99ef77f6f7e654fe20284a4 100644 (file)
 #include "brw_defines.h"
 
 static void
-brw_prepare_gs_unit(struct brw_context *brw)
+brw_upload_gs_unit(struct brw_context *brw)
 {
-   struct intel_context *intel = &brw->intel;
    struct brw_gs_unit_state *gs;
 
    gs = brw_state_batch(brw, AUB_TRACE_GS_STATE,
-                       sizeof(*gs), 32, &brw->gs.state_offset);
+                       sizeof(*gs), 32, &brw->ff_gs.state_offset);
 
    memset(gs, 0, sizeof(*gs));
 
    /* BRW_NEW_PROGRAM_CACHE | CACHE_NEW_GS_PROG */
-   if (brw->gs.prog_active) {
-      gs->thread0.grf_reg_count = (ALIGN(brw->gs.prog_data->total_grf, 16) /
+   if (brw->ff_gs.prog_active) {
+      gs->thread0.grf_reg_count = (ALIGN(brw->ff_gs.prog_data->total_grf, 16) /
                                   16 - 1);
 
       gs->thread0.kernel_start_pointer =
         brw_program_reloc(brw,
-                          brw->gs.state_offset +
+                          brw->ff_gs.state_offset +
                           offsetof(struct brw_gs_unit_state, thread0),
-                          brw->gs.prog_offset +
+                          brw->ff_gs.prog_offset +
                           (gs->thread0.grf_reg_count << 1)) >> 6;
 
       gs->thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
@@ -65,7 +64,8 @@ brw_prepare_gs_unit(struct brw_context *brw)
       gs->thread3.const_urb_entry_read_offset = 0;
       gs->thread3.const_urb_entry_read_length = 0;
       gs->thread3.urb_entry_read_offset = 0;
-      gs->thread3.urb_entry_read_length = brw->gs.prog_data->urb_read_length;
+      gs->thread3.urb_entry_read_length =
+         brw->ff_gs.prog_data->urb_read_length;
 
       /* BRW_NEW_URB_FENCE */
       gs->thread4.nr_urb_entries = brw->urb.nr_gs_entries;
@@ -77,13 +77,13 @@ brw_prepare_gs_unit(struct brw_context *brw)
         gs->thread4.max_threads = 0;
    }
 
-   if (intel->gen == 5)
+   if (brw->gen == 5)
       gs->thread4.rendering_enable = 1;
 
    if (unlikely(INTEL_DEBUG & DEBUG_STATS))
       gs->thread4.stats_enable = 1;
 
-   brw->state.dirty.cache |= CACHE_NEW_GS_UNIT;
+   brw->state.dirty.cache |= CACHE_NEW_FF_GS_UNIT;
 }
 
 const struct brw_tracked_state brw_gs_unit = {
@@ -93,7 +93,7 @@ const struct brw_tracked_state brw_gs_unit = {
                BRW_NEW_PROGRAM_CACHE |
                BRW_NEW_CURBE_OFFSETS |
                BRW_NEW_URB_FENCE),
-      .cache = CACHE_NEW_GS_PROG
+      .cache = CACHE_NEW_FF_GS_PROG
    },
-   .prepare = brw_prepare_gs_unit,
+   .emit = brw_upload_gs_unit,
 };