intel: Add a batch flush between front-buffer downsample and X protocol.

[mesa.git] / src / mesa / drivers / dri / i965 / brw_gs_state.c

diff --git a/src/mesa/drivers/dri/i965/brw_gs_state.c b/src/mesa/drivers/dri/i965/brw_gs_state.c
index e0309e71fc3df27c6f593495f8e6956a514cc96b..bee0214eb65bbba9c48da18ebc2f3cac77487af8 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_gs_state.c
+++ b/src/mesa/drivers/dri/i965/brw_gs_state.c
@@ -36,9 +36,8 @@
 #include "brw_defines.h"
 
 static void
-brw_prepare_gs_unit(struct brw_context *brw)
+brw_upload_gs_unit(struct brw_context *brw)
 {
-   struct intel_context *intel = &brw->intel;
    struct brw_gs_unit_state *gs;
 
    gs = brw_state_batch(brw, AUB_TRACE_GS_STATE,
@@ -77,7 +76,7 @@ brw_prepare_gs_unit(struct brw_context *brw)
         gs->thread4.max_threads = 0;
    }
 
-   if (intel->gen == 5)
+   if (brw->gen == 5)
       gs->thread4.rendering_enable = 1;
 
    if (unlikely(INTEL_DEBUG & DEBUG_STATS))
@@ -95,5 +94,5 @@ const struct brw_tracked_state brw_gs_unit = {
                BRW_NEW_URB_FENCE),
       .cache = CACHE_NEW_GS_PROG
    },
-   .prepare = brw_prepare_gs_unit,
+   .emit = brw_upload_gs_unit,
 };