i965: Disable hardware blending if advanced blending is in use.

[mesa.git] / src / mesa / drivers / dri / i965 / brw_inst.h

diff --git a/src/mesa/drivers/dri/i965/brw_inst.h b/src/mesa/drivers/dri/i965/brw_inst.h
index cd9f6ef591dd0eb3439ea73c05c408990f058136..f45e56400c9dd9e928e879230351ce1568481385 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_inst.h
+++ b/src/mesa/drivers/dri/i965/brw_inst.h
@@ -39,15 +39,6 @@
 extern "C" {
 #endif
 
-/** Maximum SEND message length */
-#define BRW_MAX_MSG_LENGTH 15
-
-/** First MRF register used by pull loads */
-#define FIRST_SPILL_MRF(gen) ((gen) == 6 ? 21 : 13)
-
-/** First MRF register used by spills */
-#define FIRST_PULL_LOAD_MRF(gen) ((gen) == 6 ? 16 : 13)
-
 /* brw_context.h has a forward declaration of brw_inst, so name the struct. */
 typedef struct brw_inst {
    uint64_t data[2];
@@ -585,6 +576,18 @@ brw_inst_imm_f(const struct brw_device_info *devinfo, const brw_inst *insn)
    return ft.f;
 }
 
+static inline double
+brw_inst_imm_df(const struct brw_device_info *devinfo, const brw_inst *insn)
+{
+   union {
+      double d;
+      uint64_t u;
+   } dt;
+   (void) devinfo;
+   dt.u = brw_inst_bits(insn, 127, 64);
+   return dt.d;
+}
+
 static inline void
 brw_inst_set_imm_d(const struct brw_device_info *devinfo,
                    brw_inst *insn, int value)
@@ -611,6 +614,19 @@ brw_inst_set_imm_f(const struct brw_device_info *devinfo,
    brw_inst_set_bits(insn, 127, 96, ft.u);
 }
 
+static inline void
+brw_inst_set_imm_df(const struct brw_device_info *devinfo,
+                    brw_inst *insn, double value)
+{
+   union {
+      double d;
+      uint64_t u;
+   } dt;
+   (void) devinfo;
+   dt.d = value;
+   brw_inst_set_bits(insn, 127, 64, dt.u);
+}
+
 /** @} */
 
 /* The AddrImm fields are split into two discontiguous sections on Gen8+ */