i965/vec4: Simplify opt_reduce_swizzle() using the swizzle utils.

[mesa.git] / src / mesa / drivers / dri / i965 / brw_lower_texture_gradients.cpp

diff --git a/src/mesa/drivers/dri/i965/brw_lower_texture_gradients.cpp b/src/mesa/drivers/dri/i965/brw_lower_texture_gradients.cpp
index e4e10b0d76a8105675e18d93d792cd0685c5c881..0424003ffd504948cb6bbacb30d9ab961130ce36 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_lower_texture_gradients.cpp
+++ b/src/mesa/drivers/dri/i965/brw_lower_texture_gradients.cpp
@@ -77,8 +77,7 @@ txs_type(const glsl_type *type)
       dims = 3;
       break;
    default:
-      assert(!"Should not get here: invalid sampler dimensionality");
-      dims = 2;
+      unreachable("Should not get here: invalid sampler dimensionality");
    }
 
    if (type->sampler_array)
@@ -125,7 +124,9 @@ lower_texture_grad_visitor::visit_leave(ir_texture *ir)
       new(mem_ctx) ir_variable(grad_type, "size", ir_var_temporary);
    if (ir->sampler->type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE) {
       base_ir->insert_before(size);
-      base_ir->insert_before(assign(size, expr(ir_unop_i2f, txs), WRITEMASK_XY));
+      base_ir->insert_before(assign(size,
+                                    swizzle_for_size(expr(ir_unop_i2f, txs), 2),
+                                    WRITEMASK_XY));
       base_ir->insert_before(assign(size, new(mem_ctx) ir_constant(1.0f), WRITEMASK_Z));
    } else {
       emit(size, expr(ir_unop_i2f,
@@ -168,8 +169,7 @@ bool
 brw_lower_texture_gradients(struct brw_context *brw,
                             struct exec_list *instructions)
 {
-   struct intel_context *intel = &brw->intel;
-   bool has_sample_d_c = intel->gen >= 8 || brw->is_haswell;
+   bool has_sample_d_c = brw->gen >= 8 || brw->is_haswell;
    lower_texture_grad_visitor v(has_sample_d_c);
 
    visit_list_elements(&v, instructions);