intel: Add a batch flush between front-buffer downsample and X protocol.

[mesa.git] / src / mesa / drivers / dri / i965 / brw_lower_texture_gradients.cpp

diff --git a/src/mesa/drivers/dri/i965/brw_lower_texture_gradients.cpp b/src/mesa/drivers/dri/i965/brw_lower_texture_gradients.cpp
index c5294bcf0cbc26fda6ecfd4792da522946070005..1589a20488e73b2de44751f2159767ff178f1b9b 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_lower_texture_gradients.cpp
+++ b/src/mesa/drivers/dri/i965/brw_lower_texture_gradients.cpp
@@ -165,10 +165,10 @@ lower_texture_grad_visitor::visit_leave(ir_texture *ir)
 extern "C" {
 
 bool
-brw_lower_texture_gradients(struct intel_context *intel,
+brw_lower_texture_gradients(struct brw_context *brw,
                             struct exec_list *instructions)
 {
-   bool has_sample_d_c = intel->gen >= 8 || intel->is_haswell;
+   bool has_sample_d_c = brw->gen >= 8 || brw->is_haswell;
    lower_texture_grad_visitor v(has_sample_d_c);
 
    visit_list_elements(&v, instructions);