i965/fs: Add support for translating ir_triop_fma into MAD.

[mesa.git] / src / mesa / drivers / dri / i965 / brw_schedule_instructions.cpp

diff --git a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
index f95305acb879a36e9b9576e3aab9f65b45975268..5530683df84f1dd8cf79e34fa98bdfd984952eb0 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
+++ b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
@@ -61,8 +61,6 @@ class schedule_node : public exec_node
 public:
    schedule_node(backend_instruction *inst, const struct brw_context *brw)
    {
-      const struct intel_context *intel = &brw->intel;
-
       this->inst = inst;
       this->child_array_size = 0;
       this->children = NULL;
@@ -74,8 +72,8 @@ public:
       /* We can't measure Gen6 timings directly but expect them to be much
        * closer to Gen7 than Gen4.
        */
-      if (intel->gen >= 6)
-         set_latency_gen7(intel->is_haswell);
+      if (brw->gen >= 6)
+         set_latency_gen7(brw->is_haswell);
       else
          set_latency_gen4();
    }
@@ -823,7 +821,7 @@ vec4_instruction_scheduler::calculate_deps()
          add_dep(last_mrf_write[inst->base_mrf + i], n);
       }
 
-      if (inst->predicate) {
+      if (inst->depends_on_flags()) {
          assert(last_conditional_mod);
          add_dep(last_conditional_mod, n);
       }
@@ -894,7 +892,7 @@ vec4_instruction_scheduler::calculate_deps()
          add_dep(n, last_mrf_write[inst->base_mrf + i], 2);
       }
 
-      if (inst->predicate) {
+      if (inst->depends_on_flags()) {
          add_dep(n, last_conditional_mod);
       }