i965/fs: Lower 32x32 bit multiplication on BXT.

[mesa.git] / src / mesa / drivers / dri / i965 / brw_sf.h

diff --git a/src/mesa/drivers/dri/i965/brw_sf.h b/src/mesa/drivers/dri/i965/brw_sf.h
index 6072a4295cbb849baef60780a521a53a089b9fa4..15102ac6119fb9926ddcac9ac8bd7396611562c4 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_sf.h
+++ b/src/mesa/drivers/dri/i965/brw_sf.h
@@ -1,6 +1,6 @@
 /*
  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
- Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
+ Intel funded Tungsten Graphics to
  develop this 3D driver.
 
  Permission is hereby granted, free of charge, to any person obtaining
@@ -26,7 +26,7 @@
  **********************************************************************/
  /*
   * Authors:
-  *   Keith Whitwell <keith@tungstengraphics.com>
+  *   Keith Whitwell <keithw@vmware.com>
   */
 
 
@@ -58,7 +58,7 @@ struct brw_sf_prog_key {
 };
 
 struct brw_sf_compile {
-   struct brw_compile func;
+   struct brw_codegen func;
    struct brw_sf_prog_key key;
    struct brw_sf_prog_data prog_data;
 
@@ -94,6 +94,9 @@ struct brw_sf_compile {
    GLuint nr_setup_regs;
    int urb_entry_read_offset;
 
+   /** The last known value of the f0.0 flag register. */
+   unsigned flag_value;
+
    struct brw_vue_map vue_map;
    bool has_flat_shading;
 };