i915: Remove most of the code under gen >= 4 checks.

[mesa.git] / src / mesa / drivers / dri / i965 / brw_shader.cpp

diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index 75468b1d194a117d20d923ed48ee18f933de244c..12986cc403d137bce48e3e907ba6711aa198e39d 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -28,7 +28,7 @@ extern "C" {
 }
 #include "brw_fs.h"
 #include "glsl/ir_optimization.h"
-#include "glsl/ir_print_visitor.h"
+#include "glsl/glsl_parser_extras.h"
 
 struct gl_shader *
 brw_new_shader(struct gl_context *ctx, GLuint name, GLuint type)
@@ -113,8 +113,6 @@ brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg)
    struct brw_context *brw = brw_context(ctx);
    struct intel_context *intel = &brw->intel;
    unsigned int stage;
-   static const char *target_strings[]
-      = { "vertex", "fragment", "geometry" };
 
    for (stage = 0; stage < ARRAY_SIZE(shProg->_LinkedShaders); stage++) {
       struct brw_shader *shader =
@@ -152,6 +150,9 @@ brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg)
        */
       brw_lower_packing_builtins(brw, (gl_shader_type) stage, shader->ir);
       do_mat_op_to_vec(shader->ir);
+      const int bitfield_insert = intel->gen >= 7
+                                  ? BITFIELD_INSERT_TO_BFM_BFI
+                                  : 0;
       const int lrp_to_arith = intel->gen < 6 ? LRP_TO_ARITH : 0;
       lower_instructions(shader->ir,
                         MOD_TO_FRACT |
@@ -159,6 +160,7 @@ brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg)
                         SUB_TO_ADD_NEG |
                         EXP_TO_EXP2 |
                         LOG_TO_LOG2 |
+                         bitfield_insert |
                          lrp_to_arith);
 
       /* Pre-gen6 HW can only nest if-statements 16 deep.  Beyond this,
@@ -170,6 +172,7 @@ brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg)
       do_lower_texture_projection(shader->ir);
       brw_lower_texture_gradients(intel, shader->ir);
       do_vec_index_to_cond_assign(shader->ir);
+      lower_vector_insert(shader->ir, true);
       brw_do_cubemap_normalize(shader->ir);
       lower_noise(shader->ir);
       lower_quadop_vector(shader->ir, false);
@@ -205,7 +208,8 @@ brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg)
                                   false /* loops */
                                   ) || progress;
 
-        progress = do_common_optimization(shader->ir, true, true, 32)
+        progress = do_common_optimization(shader->ir, true, true, 32,
+                                           &ctx->ShaderCompilerOptions[stage])
           || progress;
       } while (progress);
 
@@ -257,8 +261,8 @@ brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg)
 
       if (ctx->Shader.Flags & GLSL_DUMP) {
          printf("\n");
-         printf("GLSL IR for linked %s program %d:\n", target_strings[stage],
-                shProg->Name);
+         printf("GLSL IR for linked %s program %d:\n",
+                _mesa_glsl_shader_target_name(shader->base.Type), shProg->Name);
          _mesa_print_ir(shader->base.ir, NULL);
          printf("\n");
       }
@@ -271,7 +275,7 @@ brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg)
             continue;
 
          printf("GLSL %s shader %d source for linked program %d:\n",
-                target_strings[_mesa_shader_type_to_index(sh->Type)],
+                _mesa_glsl_shader_target_name(sh->Type),
                 i,
                 shProg->Name);
          printf("%s", sh->Source);
@@ -552,3 +556,14 @@ backend_instruction::is_control_flow()
       return false;
    }
 }
+
+void
+backend_visitor::dump_instructions()
+{
+   int ip = 0;
+   foreach_list(node, &this->instructions) {
+      backend_instruction *inst = (backend_instruction *)node;
+      printf("%d: ", ip++);
+      dump_instruction(inst);
+   }
+}