intel: Add a batch flush between front-buffer downsample and X protocol.

[mesa.git] / src / mesa / drivers / dri / i965 / brw_shader.cpp

diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index 6c7e827e89564bfeabf9cf536a26f73822b8cec5..e7dbdbe89207f4322967c17b7e3f73fe92aeaf2d 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -24,8 +24,8 @@
 extern "C" {
 #include "main/macros.h"
 #include "brw_context.h"
-#include "brw_vs.h"
 }
+#include "brw_vs.h"
 #include "brw_fs.h"
 #include "glsl/ir_optimization.h"
 #include "glsl/glsl_parser_extras.h"
@@ -485,7 +485,7 @@ brw_instruction_name(enum opcode op)
       return "placeholder_halt";
 
    case VS_OPCODE_URB_WRITE:
-      return "urb_write";
+      return "vs_urb_write";
    case VS_OPCODE_SCRATCH_READ:
       return "scratch_read";
    case VS_OPCODE_SCRATCH_WRITE:
@@ -497,6 +497,17 @@ brw_instruction_name(enum opcode op)
    case VS_OPCODE_UNPACK_FLAGS_SIMD4X2:
       return "unpack_flags_simd4x2";
 
+   case GS_OPCODE_URB_WRITE:
+      return "gs_urb_write";
+   case GS_OPCODE_THREAD_END:
+      return "gs_thread_end";
+   case GS_OPCODE_SET_WRITE_OFFSET:
+      return "set_write_offset";
+   case GS_OPCODE_SET_VERTEX_COUNT:
+      return "set_vertex_count";
+   case GS_OPCODE_SET_DWORD_2_IMMED:
+      return "set_dword_2_immed";
+
    default:
       /* Yes, this leaks.  It's in debug code, it should never occur, and if
        * it does, you should just add the case to the list above.