intel: Add a batch flush between front-buffer downsample and X protocol.

[mesa.git] / src / mesa / drivers / dri / i965 / brw_shader.cpp

diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index cec2d6082097c4b3acdd94acbf663a7db9bd3da9..e7dbdbe89207f4322967c17b7e3f73fe92aeaf2d 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -505,6 +505,8 @@ brw_instruction_name(enum opcode op)
       return "set_write_offset";
    case GS_OPCODE_SET_VERTEX_COUNT:
       return "set_vertex_count";
+   case GS_OPCODE_SET_DWORD_2_IMMED:
+      return "set_dword_2_immed";
 
    default:
       /* Yes, this leaks.  It's in debug code, it should never occur, and if