intel: Add a batch flush between front-buffer downsample and X protocol.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_shader.cpp
index d3de6edb8ce05f1da3339712814de6ea690cfafa..e7dbdbe89207f4322967c17b7e3f73fe92aeaf2d 100644 (file)
@@ -499,6 +499,14 @@ brw_instruction_name(enum opcode op)
 
    case GS_OPCODE_URB_WRITE:
       return "gs_urb_write";
+   case GS_OPCODE_THREAD_END:
+      return "gs_thread_end";
+   case GS_OPCODE_SET_WRITE_OFFSET:
+      return "set_write_offset";
+   case GS_OPCODE_SET_VERTEX_COUNT:
+      return "set_vertex_count";
+   case GS_OPCODE_SET_DWORD_2_IMMED:
+      return "set_dword_2_immed";
 
    default:
       /* Yes, this leaks.  It's in debug code, it should never occur, and if