#pragma once
+enum register_file {
+ BAD_FILE,
+ GRF,
+ MRF,
+ IMM,
+ HW_REG, /* a struct brw_reg */
+ ATTR,
+ UNIFORM, /* prog_data->params[reg] */
+};
+
+#ifdef __cplusplus
+
class backend_instruction : public exec_node {
public:
+ bool is_tex();
+ bool is_math();
+ bool is_control_flow();
+ bool can_do_source_mods();
+
+ /**
+ * True if the instruction has side effects other than writing to
+ * its destination registers. You are expected not to reorder or
+ * optimize these out unless you know what you are doing.
+ */
+ bool has_side_effects() const;
+
enum opcode opcode; /* BRW_OPCODE_* or FS_OPCODE_* */
+
+ uint32_t predicate;
+ bool predicate_inverse;
};
class backend_visitor : public ir_visitor {
public:
struct brw_context *brw;
- struct intel_context *intel;
struct gl_context *ctx;
- struct brw_compile *p;
struct brw_shader *shader;
- struct gl_shader_program *prog;
+ struct gl_shader_program *shader_prog;
+ struct gl_program *prog;
+ struct brw_stage_prog_data *stage_prog_data;
/** ralloc context for temporary data used during compile */
void *mem_ctx;
* backend_instruction)
*/
exec_list instructions;
+
+ virtual void dump_instruction(backend_instruction *inst) = 0;
+ void dump_instructions();
+
+ void assign_common_binding_table_offsets(uint32_t next_binding_table_offset);
};
+uint32_t brw_texture_offset(struct gl_context *ctx, ir_constant *offset);
+
+#endif /* __cplusplus */
+
int brw_type_for_base_type(const struct glsl_type *type);
uint32_t brw_conditional_for_comparison(unsigned int op);
uint32_t brw_math_function(enum opcode op);
-uint32_t brw_texture_offset(ir_constant *offset);
+const char *brw_instruction_name(enum opcode op);