i965: Refactor SIMD16-to-2xSIMD8 checks.

[mesa.git] / src / mesa / drivers / dri / i965 / brw_shader.h

diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h
index 00bb4905c4c40ec8f5e09dcddea6d1c8b442f09c..f8cc98afd911c1a416535b059eec42f4809a2485 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_shader.h
+++ b/src/mesa/drivers/dri/i965/brw_shader.h
@@ -33,6 +33,9 @@
 
 #pragma once
 
+#define MAX_SAMPLER_MESSAGE_SIZE 11
+#define MAX_VGRF_SIZE 16
+
 enum PACKED register_file {
    BAD_FILE,
    GRF,
@@ -48,6 +51,7 @@ struct backend_reg
 #ifdef __cplusplus
    bool is_zero() const;
    bool is_one() const;
+   bool is_negative_one() const;
    bool is_null() const;
    bool is_accumulator() const;
 #endif
@@ -90,6 +94,7 @@ struct backend_instruction : public exec_node {
    bool is_tex() const;
    bool is_math() const;
    bool is_control_flow() const;
+   bool is_commutative() const;
    bool can_do_source_mods() const;
    bool can_do_saturate() const;
    bool can_do_cmod() const;
@@ -135,6 +140,11 @@ struct backend_instruction {
    bool saturate:1;
    bool shadow_compare:1;
    bool header_present:1;
+
+   /* Chooses which flag subregister (f0.0 or f0.1) is used for conditional
+    * mod and predication.
+    */
+   unsigned flag_subreg:1;
 };
 
 #ifdef __cplusplus
@@ -176,6 +186,9 @@ public:
    cfg_t *cfg;
 
    gl_shader_stage stage;
+   bool debug_enabled;
+   const char *stage_name;
+   const char *stage_abbrev;
 
    brw::simple_allocator alloc;