#include "main/compiler.h"
#include "glsl/ir.h"
+#ifdef __cplusplus
+#include "brw_ir_allocator.h"
+#endif
+
#pragma once
+#define MAX_SAMPLER_MESSAGE_SIZE 11
+#define MAX_VGRF_SIZE 16
+
enum PACKED register_file {
BAD_FILE,
GRF,
#ifdef __cplusplus
bool is_zero() const;
bool is_one() const;
+ bool is_negative_one() const;
bool is_null() const;
bool is_accumulator() const;
#endif
};
struct cfg_t;
+struct bblock_t;
#ifdef __cplusplus
struct backend_instruction : public exec_node {
+ bool is_3src() const;
bool is_tex() const;
bool is_math() const;
bool is_control_flow() const;
+ bool is_commutative() const;
bool can_do_source_mods() const;
bool can_do_saturate() const;
+ bool can_do_cmod() const;
bool reads_accumulator_implicitly() const;
bool writes_accumulator_implicitly(struct brw_context *brw) const;
+ void remove(bblock_t *block);
+ void insert_after(bblock_t *block, backend_instruction *inst);
+ void insert_before(bblock_t *block, backend_instruction *inst);
+ void insert_before(bblock_t *block, exec_list *list);
+
/**
* True if the instruction has side effects other than writing to
* its destination registers. You are expected not to reorder or
const char *annotation;
/** @} */
- uint32_t texture_offset; /**< Texture offset bitfield */
- uint32_t offset; /**< spill/unspill offset */
- uint8_t sampler;
+ uint32_t offset; /**< spill/unspill offset or texture offset bitfield */
uint8_t mlen; /**< SEND message length */
int8_t base_mrf; /**< First MRF in the SEND message, if mlen is nonzero. */
uint8_t target; /**< MRT target. */
+ uint8_t regs_written; /**< Number of registers written by the instruction. */
enum opcode opcode; /* BRW_OPCODE_* or FS_OPCODE_* */
enum brw_conditional_mod conditional_mod; /**< BRW_CONDITIONAL_* */
bool no_dd_clear:1;
bool no_dd_check:1;
bool saturate:1;
+ bool shadow_compare:1;
+ bool header_present:1;
+
+ /* Chooses which flag subregister (f0.0 or f0.1) is used for conditional
+ * mod and predication.
+ */
+ unsigned flag_subreg:1;
};
#ifdef __cplusplus
*/
exec_list instructions;
+ cfg_t *cfg;
+
+ gl_shader_stage stage;
+ bool debug_enabled;
+ const char *stage_name;
+ const char *stage_abbrev;
+
+ brw::simple_allocator alloc;
+
virtual void dump_instruction(backend_instruction *inst) = 0;
virtual void dump_instruction(backend_instruction *inst, FILE *file) = 0;
virtual void dump_instructions();
virtual void dump_instructions(const char *name);
+ void calculate_cfg();
+ void invalidate_cfg();
+
void assign_common_binding_table_offsets(uint32_t next_binding_table_offset);
virtual void invalidate_live_intervals() = 0;
};
-uint32_t brw_texture_offset(struct gl_context *ctx, ir_constant *offset);
+uint32_t brw_texture_offset(struct gl_context *ctx, int *offsets,
+ unsigned num_components);
#endif /* __cplusplus */
enum brw_conditional_mod brw_conditional_for_comparison(unsigned int op);
uint32_t brw_math_function(enum opcode op);
const char *brw_instruction_name(enum opcode op);
+bool brw_saturate_immediate(enum brw_reg_type type, struct brw_reg *reg);
+bool brw_negate_immediate(enum brw_reg_type type, struct brw_reg *reg);
+bool brw_abs_immediate(enum brw_reg_type type, struct brw_reg *reg);
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+bool brw_vs_precompile(struct gl_context *ctx,
+ struct gl_shader_program *shader_prog,
+ struct gl_program *prog);
+bool brw_gs_precompile(struct gl_context *ctx,
+ struct gl_shader_program *shader_prog,
+ struct gl_program *prog);
+bool brw_fs_precompile(struct gl_context *ctx,
+ struct gl_shader_program *shader_prog,
+ struct gl_program *prog);
+
+#ifdef __cplusplus
+}
+#endif