i965/skl: Send a message header when doing constant loads SIMD4x2

[mesa.git] / src / mesa / drivers / dri / i965 / brw_state.h

diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index 399347c15fe6cf910767d8e63dc147a79bf9c8d8..71210b9410c01e8d9a52d89653505f276a7cb3b5 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -152,6 +152,13 @@ extern const struct brw_tracked_state gen8_vertices;
 extern const struct brw_tracked_state gen8_vf_topology;
 extern const struct brw_tracked_state gen8_vs_state;
 
+static inline bool
+brw_state_dirty(struct brw_context *brw, GLuint mesa_flags, uint64_t brw_flags)
+{
+   return ((brw->state.dirty.mesa & mesa_flags) |
+           (brw->state.dirty.brw & brw_flags)) != 0;
+}
+
 /* brw_misc_state.c */
 void brw_upload_invariant_state(struct brw_context *brw);
 uint32_t
@@ -225,7 +232,6 @@ int brw_get_texture_swizzle(const struct gl_context *ctx,
                             const struct gl_texture_object *t);
 
 /* gen7_wm_surface_state.c */
-unsigned brw_swizzle_to_scs(GLenum swizzle, bool need_green_to_blue);
 uint32_t gen7_surface_tiling_mode(uint32_t tiling);
 uint32_t gen7_surface_msaa_bits(unsigned num_samples, enum intel_msaa_layout l);
 void gen7_set_surface_mcs_info(struct brw_context *brw,