i965/fs: Handle fixed HW GRF subnr in reg_offset().

[mesa.git] / src / mesa / drivers / dri / i965 / brw_state_dump.c

diff --git a/src/mesa/drivers/dri/i965/brw_state_dump.c b/src/mesa/drivers/dri/i965/brw_state_dump.c
index b6f4d598e1df2dcfa2ce1a2a46e90c942ac8ea33..6cd61c21fac24fb1b3ce89739af6a796aa685300 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_state_dump.c
+++ b/src/mesa/drivers/dri/i965/brw_state_dump.c
@@ -28,6 +28,8 @@
 #include "main/mtypes.h"
 #include "intel_batchbuffer.h"
 
+#include "isl/isl.h"
+
 #include "brw_context.h"
 #include "brw_defines.h"
 #include "brw_eu.h"
@@ -217,7 +219,7 @@ static void dump_surface_state(struct brw_context *brw, uint32_t offset)
 
    batch_out(brw, name, offset, 0, "%s %s\n",
             get_965_surfacetype(GET_FIELD(surf[0], BRW_SURFACE_TYPE)),
-             brw_surface_format_name(GET_FIELD(surf[0], BRW_SURFACE_FORMAT)));
+             isl_format_get_name(GET_FIELD(surf[0], BRW_SURFACE_FORMAT)));
    batch_out(brw, name, offset, 1, "offset\n");
    batch_out(brw, name, offset, 2, "%dx%d size, %d mips\n",
             GET_FIELD(surf[2], BRW_SURFACE_WIDTH) + 1,
@@ -241,7 +243,7 @@ static void dump_gen7_surface_state(struct brw_context *brw, uint32_t offset)
 
    batch_out(brw, name, offset, 0, "%s %s %s\n",
              get_965_surfacetype(GET_FIELD(surf[0], BRW_SURFACE_TYPE)),
-             brw_surface_format_name(GET_FIELD(surf[0], BRW_SURFACE_FORMAT)),
+             isl_format_get_name(GET_FIELD(surf[0], BRW_SURFACE_FORMAT)),
              (surf[0] & GEN7_SURFACE_IS_ARRAY) ? "array" : "");
    batch_out(brw, name, offset, 1, "offset\n");
    batch_out(brw, name, offset, 2, "%dx%d size, %d mips, %d slices\n",
@@ -298,7 +300,7 @@ dump_gen8_surface_state(struct brw_context *brw, uint32_t offset, int index)
    name = ralloc_asprintf(NULL, "SURF%03d", index);
    batch_out(brw, name, offset, 0, "%s %s %s VALIGN%d HALIGN%d %s\n",
              get_965_surfacetype(GET_FIELD(surf[0], BRW_SURFACE_TYPE)),
-             brw_surface_format_name(GET_FIELD(surf[0], BRW_SURFACE_FORMAT)),
+             isl_format_get_name(GET_FIELD(surf[0], BRW_SURFACE_FORMAT)),
              (surf[0] & GEN7_SURFACE_IS_ARRAY) ? "array" : "",
              1 << (GET_BITS(surf[0], 17, 16) + 1), /* VALIGN */
              1 << (GET_BITS(surf[0], 15, 14) + 1), /* HALIGN */
@@ -319,10 +321,13 @@ dump_gen8_surface_state(struct brw_context *brw, uint32_t offset, int index)
              GET_FIELD(surf[4], GEN7_SURFACE_MIN_ARRAY_ELEMENT),
              GET_FIELD(surf[4], GEN7_SURFACE_RENDER_TARGET_VIEW_EXTENT) + 1,
              1 << GET_BITS(surf[4], 5, 3));
-   batch_out(brw, name, offset, 5, "x,y offset: %d,%d, min LOD: %d\n",
+   batch_out(brw, name, offset, 5, "x,y offset: %d,%d, min LOD: %d,"
+             " tr_mode (gen9+): %d, mip tail (gen9+): %d\n",
              GET_FIELD(surf[5], BRW_SURFACE_X_OFFSET),
              GET_FIELD(surf[5], BRW_SURFACE_Y_OFFSET),
-             GET_FIELD(surf[5], GEN7_SURFACE_MIN_LOD));
+             GET_FIELD(surf[5], GEN7_SURFACE_MIN_LOD),
+             GET_FIELD(surf[5], GEN9_SURFACE_TRMODE),
+             GET_FIELD(surf[5], GEN9_SURFACE_MIP_TAIL_START_LOD));
    batch_out(brw, name, offset, 6, "AUX pitch: %d qpitch: %d\n",
              GET_FIELD(surf[6], GEN8_SURFACE_AUX_QPITCH) << 2,
              GET_FIELD(surf[6], GEN8_SURFACE_AUX_PITCH) << 2);
@@ -376,13 +381,13 @@ dump_sdc(struct brw_context *brw, uint32_t offset)
 static void dump_sampler_state(struct brw_context *brw,
                               uint32_t offset, uint32_t size)
 {
-   int i;
+   unsigned i;
    uint32_t *samp = brw->batch.bo->virtual + offset;
 
    for (i = 0; i < size / 16; i++) {
       char name[20];
 
-      sprintf(name, "WM SAMP%d", i);
+      sprintf(name, "WM SAMP%u", i);
       batch_out(brw, name, offset, 0, "filtering\n");
       batch_out(brw, name, offset, 1, "wrapping, lod\n");
       batch_out(brw, name, offset, 2, "default color pointer\n");
@@ -420,11 +425,12 @@ static void gen7_dump_sampler_state(struct brw_context *brw,
                 GET_BITS(samp[1], 15, 8)
                );
       batch_out(brw, name, offset, i+2, "Border Color\n"); /* FINISHME: gen8+ */
-      batch_out(brw, name, offset, i+3, "Max aniso: RATIO %d:1, TC[XYZ] Address Control: %s|%s|%s\n",
+      batch_out(brw, name, offset, i+3, "Max aniso: RATIO %d:1, TC[XYZ] Address Control: %s|%s|%s, %snormalized coords\n",
                 (GET_FIELD(samp[3], BRW_SAMPLER_MAX_ANISOTROPY) + 1) * 2,
                 sampler_addr_mode[GET_FIELD(samp[3], BRW_SAMPLER_TCX_WRAP_MODE)],
                 sampler_addr_mode[GET_FIELD(samp[3], BRW_SAMPLER_TCY_WRAP_MODE)],
-                sampler_addr_mode[GET_FIELD(samp[3], BRW_SAMPLER_TCZ_WRAP_MODE)]
+                sampler_addr_mode[GET_FIELD(samp[3], BRW_SAMPLER_TCZ_WRAP_MODE)],
+                (samp[3] & GEN7_SAMPLER_NON_NORMALIZED_COORDINATES) ? "non-" : ""
                );
 
       samp += 4;
@@ -729,6 +735,12 @@ dump_prog_cache(struct brw_context *brw)
         case BRW_CACHE_VS_PROG:
            name = "VS kernel";
            break;
+         case BRW_CACHE_TCS_PROG:
+            name = "TCS kernel";
+            break;
+         case BRW_CACHE_TES_PROG:
+            name = "TES kernel";
+            break;
         case BRW_CACHE_FF_GS_PROG:
            name = "Fixed-function GS kernel";
            break;