i965: Remove the validated BO list, now that it's unused.

[mesa.git] / src / mesa / drivers / dri / i965 / brw_state_upload.c

diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index e2c690ee568ae2387d6e7f0ea5fc1a225e75f830..2737feef89a9c7d00bc3d9b582c5ced4b646c114 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -47,11 +47,11 @@ static const struct brw_tracked_state *gen4_atoms[] =
    &brw_check_fallback,
 
    &brw_wm_input_sizes,
-   &brw_vs_prog,
-   &brw_gs_prog, 
-   &brw_clip_prog, 
-   &brw_sf_prog,
-   &brw_wm_prog,
+   &brw_vs_prog, /* must do before GS prog, state base address. */
+   &brw_gs_prog, /* must do before state base address */
+   &brw_clip_prog, /* must do before state base address */
+   &brw_sf_prog, /* must do before state base address */
+   &brw_wm_prog, /* must do before state base address */
 
    /* Once all the programs are done, we know how large urb entry
     * sizes need to be and can decide if we need to change the urb
@@ -110,9 +110,9 @@ static const struct brw_tracked_state *gen6_atoms[] =
    &brw_check_fallback,
 
    &brw_wm_input_sizes,
-   &brw_vs_prog,
-   &brw_gs_prog,
-   &brw_wm_prog,
+   &brw_vs_prog, /* must do before state base address */
+   &brw_gs_prog, /* must do before state base address */
+   &brw_wm_prog, /* must do before state base address */
 
    &gen6_clip_vp,
    &gen6_sf_vp,
@@ -179,9 +179,6 @@ const struct brw_tracked_state *gen7_atoms[] =
    &brw_gs_prog,
    &brw_wm_prog,
 
-   &gen6_clip_vp,
-   &gen6_sf_vp,
-
    /* Command packets: */
    &brw_invarient_state,
 
@@ -189,39 +186,40 @@ const struct brw_tracked_state *gen7_atoms[] =
    &brw_state_base_address,
 
    &brw_cc_vp,
-   &gen6_viewport_state,       /* must do after *_vp stages */
+   &gen7_cc_viewport_state_pointer, /* must do after brw_cc_vp */
+   &gen7_sf_clip_viewport,
 
    &gen7_urb,
    &gen6_blend_state,          /* must do before cc unit */
    &gen6_color_calc_state,     /* must do before cc unit */
    &gen6_depth_stencil_state,  /* must do before cc unit */
-   &gen6_cc_state_pointers,
+   &gen7_blend_state_pointer,
+   &gen7_cc_state_pointer,
+   &gen7_depth_stencil_state_pointer,
 
    &brw_vs_constants, /* Before vs_surfaces and constant_buffer */
    &brw_wm_constants, /* Before wm_surfaces and constant_buffer */
    &gen6_vs_constants, /* Before vs_state */
-   &gen6_wm_constants, /* Before wm_state */
+   &gen6_wm_constants, /* Before wm_surfaces and constant_buffer */
 
    &brw_vs_surfaces,           /* must do before unit */
-   &brw_wm_constant_surface,   /* must do before wm surfaces/bind bo */
-   &brw_wm_surfaces,           /* must do before samplers and unit */
+   &gen7_wm_constant_surface,  /* must do before wm surfaces/bind bo */
+   &gen7_wm_surfaces,          /* must do before samplers and unit */
    &brw_wm_binding_table,
 
-   &brw_wm_samplers,
-   &gen6_sampler_state,
+   &gen7_samplers,
 
-   &gen6_vs_state,
-   &gen6_gs_state,
-   &gen6_clip_state,
+   &gen7_disable_stages,
+   &gen7_vs_state,
+   &gen7_clip_state,
    &gen7_sbe_state,
    &gen7_sf_state,
-   &gen6_wm_state,
+   &gen7_wm_state,
+   &gen7_ps_state,
 
    &gen6_scissor_state,
 
-   &gen6_binding_table_pointers,
-
-   &brw_depthbuffer,
+   &gen7_depthbuffer,
 
    &brw_polygon_stipple,
    &brw_polygon_stipple_offset,
@@ -305,19 +303,6 @@ static void xor_states( struct brw_state_flags *result,
    result->cache = a->cache ^ b->cache;
 }
 
-void
-brw_clear_validated_bos(struct brw_context *brw)
-{
-   int i;
-
-   /* Clear the last round of validated bos */
-   for (i = 0; i < brw->state.validated_bo_count; i++) {
-      drm_intel_bo_unreference(brw->state.validated_bos[i]);
-      brw->state.validated_bos[i] = NULL;
-   }
-   brw->state.validated_bo_count = 0;
-}
-
 struct dirty_bit_map {
    uint32_t bit;
    char *name;
@@ -367,18 +352,21 @@ static struct dirty_bit_map brw_bits[] = {
    DEFINE_BIT(BRW_NEW_PRIMITIVE),
    DEFINE_BIT(BRW_NEW_CONTEXT),
    DEFINE_BIT(BRW_NEW_WM_INPUT_DIMENSIONS),
+   DEFINE_BIT(BRW_NEW_PROGRAM_CACHE),
    DEFINE_BIT(BRW_NEW_PSP),
    DEFINE_BIT(BRW_NEW_WM_SURFACES),
-   DEFINE_BIT(BRW_NEW_BINDING_TABLE),
    DEFINE_BIT(BRW_NEW_INDICES),
    DEFINE_BIT(BRW_NEW_INDEX_BUFFER),
    DEFINE_BIT(BRW_NEW_VERTICES),
    DEFINE_BIT(BRW_NEW_BATCH),
-   DEFINE_BIT(BRW_NEW_DEPTH_BUFFER),
    DEFINE_BIT(BRW_NEW_NR_WM_SURFACES),
    DEFINE_BIT(BRW_NEW_NR_VS_SURFACES),
    DEFINE_BIT(BRW_NEW_VS_CONSTBUF),
    DEFINE_BIT(BRW_NEW_WM_CONSTBUF),
+   DEFINE_BIT(BRW_NEW_VS_BINDING_TABLE),
+   DEFINE_BIT(BRW_NEW_GS_BINDING_TABLE),
+   DEFINE_BIT(BRW_NEW_PS_BINDING_TABLE),
+   DEFINE_BIT(BRW_NEW_STATE_BASE_ADDRESS),
    {0, 0, 0}
 };
 
@@ -443,13 +431,9 @@ void brw_validate_state( struct brw_context *brw )
    int num_atoms = brw->num_prepare_atoms;
    GLuint i;
 
-   brw_clear_validated_bos(brw);
-
    state->mesa |= brw->intel.NewGLState;
    brw->intel.NewGLState = 0;
 
-   brw_add_validated_bo(brw, intel->batch.bo);
-
    if (brw->emit_state_always) {
       state->mesa |= ~0;
       state->brw |= ~0;
@@ -469,7 +453,7 @@ void brw_validate_state( struct brw_context *brw )
    if ((state->mesa | state->cache | state->brw) == 0)
       return;
 
-   brw->intel.Fallback = GL_FALSE; /* boolean, not bitfield */
+   brw->intel.Fallback = false; /* boolean, not bitfield */
 
    /* do prepare stage for all atoms */
    for (i = 0; i < num_atoms; i++) {
@@ -508,8 +492,6 @@ void brw_upload_state(struct brw_context *brw)
    int i;
    static int dirty_count = 0;
 
-   brw_clear_validated_bos(brw);
-
    if (unlikely(INTEL_DEBUG)) {
       /* Debug version which enforces various sanity checks on the
        * state flags which are generated and checked to help ensure