/*
Copyright (C) Intel Corp. 2006. All Rights Reserved.
- Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
+ Intel funded Tungsten Graphics to
develop this 3D driver.
-
+
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
"Software"), to deal in the Software without restriction, including
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
-
+
The above copyright notice and this permission notice (including the
next paragraph) shall be included in all copies or substantial
portions of the Software.
-
+
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
+
**********************************************************************/
/*
* Authors:
- * Keith Whitwell <keith@tungstengraphics.com>
+ * Keith Whitwell <keithw@vmware.com>
*/
-
+
#include "brw_context.h"
static const struct brw_tracked_state *gen4_atoms[] =
{
&brw_vs_prog, /* must do before GS prog, state base address. */
- &brw_gs_prog, /* must do before state base address */
+ &brw_ff_gs_prog, /* must do before state base address */
+
+ &brw_interpolation_map,
+
&brw_clip_prog, /* must do before state base address */
&brw_sf_prog, /* must do before state base address */
&brw_wm_prog, /* must do before state base address */
&brw_vs_binding_table,
&brw_wm_binding_table,
- &brw_samplers,
+ &brw_fs_samplers,
+ &brw_vs_samplers,
/* These set up state for brw_psp_urb_cbs */
&brw_wm_unit,
&brw_sf_unit,
&brw_vs_unit, /* always required, enabled or not */
&brw_clip_unit,
- &brw_gs_unit,
+ &brw_gs_unit,
/* Command packets:
*/
&brw_psp_urb_cbs,
&brw_drawing_rect,
- &brw_indices,
+ &brw_indices, /* must come before brw_vertices */
&brw_index_buffer,
&brw_vertices,
&gen6_depth_stencil_state, /* must do before cc unit */
&gen6_vs_push_constants, /* Before vs_state */
+ &gen6_gs_push_constants, /* Before gs_state */
&gen6_wm_push_constants, /* Before wm_state */
/* Surface state setup. Must come before the VS/WM unit. The binding
&gen6_gs_binding_table,
&brw_wm_binding_table,
- &brw_samplers,
+ &brw_fs_samplers,
+ &brw_vs_samplers,
&gen6_sampler_state,
&gen6_multisample_state,
&brw_drawing_rect,
- &brw_indices,
+ &brw_indices, /* must come before brw_vertices */
&brw_index_buffer,
&brw_vertices,
};
static const struct brw_tracked_state *gen7_atoms[] =
{
&brw_vs_prog,
+ &brw_gs_prog,
&brw_wm_prog,
/* Command packets: */
&gen7_cc_viewport_state_pointer, /* must do after brw_cc_vp */
&gen7_sf_clip_viewport,
+ &gen7_push_constant_space,
&gen7_urb,
&gen6_blend_state, /* must do before cc unit */
&gen6_color_calc_state, /* must do before cc unit */
&gen6_depth_stencil_state, /* must do before cc unit */
&gen6_vs_push_constants, /* Before vs_state */
+ &gen7_gs_push_constants, /* Before gs_state */
&gen6_wm_push_constants, /* Before wm_surfaces and constant_buffer */
/* Surface state setup. Must come before the VS/WM unit. The binding
*/
&brw_vs_pull_constants,
&brw_vs_ubo_surfaces,
+ &brw_vs_abo_surfaces,
+ &brw_gs_pull_constants,
+ &brw_gs_ubo_surfaces,
+ &brw_gs_abo_surfaces,
&brw_wm_pull_constants,
&brw_wm_ubo_surfaces,
+ &brw_wm_abo_surfaces,
&gen6_renderbuffer_surfaces,
&brw_texture_surfaces,
&brw_vs_binding_table,
+ &brw_gs_binding_table,
&brw_wm_binding_table,
- &gen7_samplers,
+ &brw_fs_samplers,
+ &brw_vs_samplers,
+ &brw_gs_samplers,
&gen6_multisample_state,
&gen7_disable_stages,
&gen7_vs_state,
+ &gen7_gs_state,
&gen7_sol_state,
&gen7_clip_state,
&gen7_sbe_state,
&brw_drawing_rect,
- &brw_indices,
+ &brw_indices, /* must come before brw_vertices */
&brw_index_buffer,
&brw_vertices,
&haswell_cut_index,
};
+static const struct brw_tracked_state *gen8_atoms[] =
+{
+ &brw_vs_prog,
+ &brw_gs_prog,
+ &brw_wm_prog,
+
+ /* Command packets: */
+ &gen8_state_base_address,
+
+ &brw_cc_vp,
+ &gen7_cc_viewport_state_pointer, /* must do after brw_cc_vp */
+ &gen8_sf_clip_viewport,
+
+ &gen7_push_constant_space,
+ &gen7_urb,
+ &gen8_blend_state,
+ &gen6_color_calc_state,
+
+ &gen6_vs_push_constants, /* Before vs_state */
+ &gen7_gs_push_constants, /* Before gs_state */
+ &gen6_wm_push_constants, /* Before wm_surfaces and constant_buffer */
+
+ /* Surface state setup. Must come before the VS/WM unit. The binding
+ * table upload must be last.
+ */
+ &brw_vs_pull_constants,
+ &brw_vs_ubo_surfaces,
+ &brw_vs_abo_surfaces,
+ &brw_gs_pull_constants,
+ &brw_gs_ubo_surfaces,
+ &brw_gs_abo_surfaces,
+ &brw_wm_pull_constants,
+ &brw_wm_ubo_surfaces,
+ &brw_wm_abo_surfaces,
+ &gen6_renderbuffer_surfaces,
+ &brw_texture_surfaces,
+ &brw_vs_binding_table,
+ &brw_gs_binding_table,
+ &brw_wm_binding_table,
+
+ &brw_fs_samplers,
+ &brw_vs_samplers,
+ &brw_gs_samplers,
+ &gen8_multisample_state,
+
+ &gen8_disable_stages,
+ &gen8_vs_state,
+ &gen8_gs_state,
+ &gen8_sol_state,
+ &gen6_clip_state,
+ &gen8_raster_state,
+ &gen8_sbe_state,
+ &gen8_sf_state,
+ &gen8_ps_blend,
+ &gen8_ps_extra,
+ &gen8_ps_state,
+ &gen8_wm_depth_stencil,
+ &gen8_wm_state,
+
+ &gen6_scissor_state,
+
+ &gen7_depthbuffer,
+
+ &brw_polygon_stipple,
+ &brw_polygon_stipple_offset,
+
+ &brw_line_stipple,
+ &brw_aa_line_parameters,
+
+ &brw_drawing_rect,
+
+ &gen8_vf_topology,
+
+ &brw_indices,
+ &gen8_index_buffer,
+ &gen8_vertices,
+
+ &haswell_cut_index,
+};
+
static void
brw_upload_initial_gpu_state(struct brw_context *brw)
{
brw_upload_invariant_state(brw);
- if (brw->gen >= 7) {
- gen7_allocate_push_constants(brw);
+ if (brw->gen >= 8) {
+ gen8_emit_3dstate_sample_pattern(brw);
}
}
void brw_init_state( struct brw_context *brw )
{
+ struct gl_context *ctx = &brw->ctx;
const struct brw_tracked_state **atoms;
int num_atoms;
brw_init_caches(brw);
- if (brw->gen >= 7) {
+ if (brw->gen >= 8) {
+ atoms = gen8_atoms;
+ num_atoms = ARRAY_SIZE(gen8_atoms);
+ } else if (brw->gen == 7) {
atoms = gen7_atoms;
num_atoms = ARRAY_SIZE(gen7_atoms);
} else if (brw->gen == 6) {
}
brw_upload_initial_gpu_state(brw);
+
+ brw->state.dirty.mesa = ~0;
+ brw->state.dirty.brw = ~0;
+
+ /* Make sure that brw->state.dirty.brw has enough bits to hold all possible
+ * dirty flags.
+ */
+ STATIC_ASSERT(BRW_NUM_STATE_BITS <= 8 * sizeof(brw->state.dirty.brw));
+
+ ctx->DriverFlags.NewTransformFeedback = BRW_NEW_TRANSFORM_FEEDBACK;
+ ctx->DriverFlags.NewTransformFeedbackProg = BRW_NEW_TRANSFORM_FEEDBACK;
+ ctx->DriverFlags.NewRasterizerDiscard = BRW_NEW_RASTERIZER_DISCARD;
+ ctx->DriverFlags.NewUniformBuffer = BRW_NEW_UNIFORM_BUFFER;
+ ctx->DriverFlags.NewAtomicBuffer = BRW_NEW_ATOMIC_BUFFER;
}
DEFINE_BIT(_NEW_ARRAY),
DEFINE_BIT(_NEW_RENDERMODE),
DEFINE_BIT(_NEW_BUFFERS),
+ DEFINE_BIT(_NEW_CURRENT_ATTRIB),
DEFINE_BIT(_NEW_MULTISAMPLE),
DEFINE_BIT(_NEW_TRACK_MATRIX),
DEFINE_BIT(_NEW_PROGRAM),
static struct dirty_bit_map brw_bits[] = {
DEFINE_BIT(BRW_NEW_URB_FENCE),
DEFINE_BIT(BRW_NEW_FRAGMENT_PROGRAM),
+ DEFINE_BIT(BRW_NEW_GEOMETRY_PROGRAM),
DEFINE_BIT(BRW_NEW_VERTEX_PROGRAM),
DEFINE_BIT(BRW_NEW_CURBE_OFFSETS),
DEFINE_BIT(BRW_NEW_REDUCED_PRIMITIVE),
DEFINE_BIT(BRW_NEW_BATCH),
DEFINE_BIT(BRW_NEW_INDEX_BUFFER),
DEFINE_BIT(BRW_NEW_VS_CONSTBUF),
+ DEFINE_BIT(BRW_NEW_GS_CONSTBUF),
DEFINE_BIT(BRW_NEW_PROGRAM_CACHE),
DEFINE_BIT(BRW_NEW_STATE_BASE_ADDRESS),
+ DEFINE_BIT(BRW_NEW_VUE_MAP_VS),
DEFINE_BIT(BRW_NEW_VUE_MAP_GEOM_OUT),
DEFINE_BIT(BRW_NEW_TRANSFORM_FEEDBACK),
DEFINE_BIT(BRW_NEW_RASTERIZER_DISCARD),
+ DEFINE_BIT(BRW_NEW_STATS_WM),
DEFINE_BIT(BRW_NEW_UNIFORM_BUFFER),
+ DEFINE_BIT(BRW_NEW_ATOMIC_BUFFER),
DEFINE_BIT(BRW_NEW_META_IN_PROGRESS),
+ DEFINE_BIT(BRW_NEW_INTERPOLATION_MAP),
+ DEFINE_BIT(BRW_NEW_PUSH_CONSTANT_ALLOCATION),
+ DEFINE_BIT(BRW_NEW_NUM_SAMPLES),
{0, 0, 0}
};
DEFINE_BIT(CACHE_NEW_CC_VP),
DEFINE_BIT(CACHE_NEW_CC_UNIT),
DEFINE_BIT(CACHE_NEW_WM_PROG),
+ DEFINE_BIT(CACHE_NEW_BLORP_BLIT_PROG),
+ DEFINE_BIT(CACHE_NEW_BLORP_CONST_COLOR_PROG),
DEFINE_BIT(CACHE_NEW_SAMPLER),
DEFINE_BIT(CACHE_NEW_WM_UNIT),
DEFINE_BIT(CACHE_NEW_SF_PROG),
DEFINE_BIT(CACHE_NEW_SF_UNIT),
DEFINE_BIT(CACHE_NEW_VS_UNIT),
DEFINE_BIT(CACHE_NEW_VS_PROG),
- DEFINE_BIT(CACHE_NEW_GS_UNIT),
+ DEFINE_BIT(CACHE_NEW_FF_GS_UNIT),
+ DEFINE_BIT(CACHE_NEW_FF_GS_PROG),
DEFINE_BIT(CACHE_NEW_GS_PROG),
DEFINE_BIT(CACHE_NEW_CLIP_VP),
DEFINE_BIT(CACHE_NEW_CLIP_UNIT),
state->brw |= ctx->NewDriverState;
ctx->NewDriverState = 0;
- if (brw->emit_state_always) {
+ if (0) {
+ /* Always re-emit all state. */
state->mesa |= ~0;
state->brw |= ~0;
state->cache |= ~0;
brw->state.dirty.brw |= BRW_NEW_FRAGMENT_PROGRAM;
}
+ if (brw->geometry_program != ctx->GeometryProgram._Current) {
+ brw->geometry_program = ctx->GeometryProgram._Current;
+ brw->state.dirty.brw |= BRW_NEW_GEOMETRY_PROGRAM;
+ }
+
if (brw->vertex_program != ctx->VertexProgram._Current) {
brw->vertex_program = ctx->VertexProgram._Current;
brw->state.dirty.brw |= BRW_NEW_VERTEX_PROGRAM;
brw->state.dirty.brw |= BRW_NEW_META_IN_PROGRESS;
}
+ if (brw->num_samples != ctx->DrawBuffer->Visual.samples) {
+ brw->num_samples = ctx->DrawBuffer->Visual.samples;
+ brw->state.dirty.brw |= BRW_NEW_NUM_SAMPLES;
+ }
+
if ((state->mesa | state->cache | state->brw) == 0)
return;
- intel_check_front_buffer_rendering(brw);
-
if (unlikely(INTEL_DEBUG)) {
/* Debug version which enforces various sanity checks on the
* state flags which are generated and checked to help ensure
* state atoms are ordered correctly in the list.
*/
- struct brw_state_flags examined, prev;
+ struct brw_state_flags examined, prev;
memset(&examined, 0, sizeof(examined));
prev = *state;
}
if (unlikely(INTEL_DEBUG & DEBUG_STATE)) {
+ STATIC_ASSERT(ARRAY_SIZE(brw_bits) == BRW_NUM_STATE_BITS + 1);
+ STATIC_ASSERT(ARRAY_SIZE(cache_bits) == BRW_MAX_CACHE + 1);
+
brw_update_dirty_count(mesa_bits, state->mesa);
brw_update_dirty_count(brw_bits, state->brw);
brw_update_dirty_count(cache_bits, state->cache);
fprintf(stderr, "\n");
}
}
+}
+
+/**
+ * Clear dirty bits to account for the fact that the state emitted by
+ * brw_upload_state() has been committed to the hardware. This is a separate
+ * call from brw_upload_state() because it's possible that after the call to
+ * brw_upload_state(), we will discover that we've run out of aperture space,
+ * and need to rewind the batch buffer to the state it had before the
+ * brw_upload_state() call.
+ */
+void
+brw_clear_dirty_bits(struct brw_context *brw)
+{
+ struct brw_state_flags *state = &brw->state.dirty;
memset(state, 0, sizeof(*state));
}
projects / mesa.git / blobdiff