&brw_check_fallback,
&brw_wm_input_sizes,
- &brw_vs_prog,
- &brw_gs_prog,
- &brw_clip_prog,
- &brw_sf_prog,
- &brw_wm_prog,
+ &brw_vs_prog, /* must do before GS prog, state base address. */
+ &brw_gs_prog, /* must do before state base address */
+ &brw_clip_prog, /* must do before state base address */
+ &brw_sf_prog, /* must do before state base address */
+ &brw_wm_prog, /* must do before state base address */
/* Once all the programs are done, we know how large urb entry
* sizes need to be and can decide if we need to change the urb
&brw_check_fallback,
&brw_wm_input_sizes,
- &brw_vs_prog,
- &brw_gs_prog,
- &brw_wm_prog,
+ &brw_vs_prog, /* must do before state base address */
+ &brw_gs_prog, /* must do before state base address */
+ &brw_wm_prog, /* must do before state base address */
&gen6_clip_vp,
&gen6_sf_vp,
&brw_vertices,
};
+const struct brw_tracked_state *gen7_atoms[] =
+{
+ &brw_check_fallback,
+
+ &brw_wm_input_sizes,
+ &brw_vs_prog,
+ &brw_gs_prog,
+ &brw_wm_prog,
+
+ /* Command packets: */
+ &brw_invarient_state,
+
+ /* must do before binding table pointers, cc state ptrs */
+ &brw_state_base_address,
+
+ &brw_cc_vp,
+ &gen7_cc_viewport_state_pointer, /* must do after brw_cc_vp */
+ &gen7_sf_clip_viewport,
+
+ &gen7_urb,
+ &gen6_blend_state, /* must do before cc unit */
+ &gen6_color_calc_state, /* must do before cc unit */
+ &gen6_depth_stencil_state, /* must do before cc unit */
+ &gen7_blend_state_pointer,
+ &gen7_cc_state_pointer,
+ &gen7_depth_stencil_state_pointer,
+
+ &brw_vs_constants, /* Before vs_surfaces and constant_buffer */
+ &brw_wm_constants, /* Before wm_surfaces and constant_buffer */
+ &gen6_vs_constants, /* Before vs_state */
+ &gen7_wm_constants, /* Before wm_surfaces and constant_buffer */
+
+ &brw_vs_surfaces, /* must do before unit */
+ &gen7_wm_constant_surface, /* must do before wm surfaces/bind bo */
+ &gen7_wm_surfaces, /* must do before samplers and unit */
+ &brw_wm_binding_table,
+
+ &gen7_samplers,
+
+ &gen7_disable_stages,
+ &gen7_vs_state,
+ &gen7_clip_state,
+ &gen7_sbe_state,
+ &gen7_sf_state,
+ &gen7_wm_state,
+ &gen7_ps_state,
+
+ &gen6_scissor_state,
+
+ &gen7_depthbuffer,
+
+ &brw_polygon_stipple,
+ &brw_polygon_stipple_offset,
+
+ &brw_line_stipple,
+ &brw_aa_line_parameters,
+
+ &brw_drawing_rect,
+
+ &brw_indices,
+ &brw_index_buffer,
+ &brw_vertices,
+};
+
+
void brw_init_state( struct brw_context *brw )
{
const struct brw_tracked_state **atoms;
brw_init_caches(brw);
- if (brw->intel.gen >= 6) {
+ if (brw->intel.gen >= 7) {
+ atoms = gen7_atoms;
+ num_atoms = ARRAY_SIZE(gen7_atoms);
+ } else if (brw->intel.gen == 6) {
atoms = gen6_atoms;
num_atoms = ARRAY_SIZE(gen6_atoms);
} else {
DEFINE_BIT(BRW_NEW_PRIMITIVE),
DEFINE_BIT(BRW_NEW_CONTEXT),
DEFINE_BIT(BRW_NEW_WM_INPUT_DIMENSIONS),
+ DEFINE_BIT(BRW_NEW_PROGRAM_CACHE),
DEFINE_BIT(BRW_NEW_PSP),
DEFINE_BIT(BRW_NEW_WM_SURFACES),
- DEFINE_BIT(BRW_NEW_BINDING_TABLE),
DEFINE_BIT(BRW_NEW_INDICES),
DEFINE_BIT(BRW_NEW_INDEX_BUFFER),
DEFINE_BIT(BRW_NEW_VERTICES),
DEFINE_BIT(BRW_NEW_BATCH),
- DEFINE_BIT(BRW_NEW_DEPTH_BUFFER),
DEFINE_BIT(BRW_NEW_NR_WM_SURFACES),
DEFINE_BIT(BRW_NEW_NR_VS_SURFACES),
DEFINE_BIT(BRW_NEW_VS_CONSTBUF),
DEFINE_BIT(BRW_NEW_WM_CONSTBUF),
+ DEFINE_BIT(BRW_NEW_VS_BINDING_TABLE),
+ DEFINE_BIT(BRW_NEW_GS_BINDING_TABLE),
+ DEFINE_BIT(BRW_NEW_PS_BINDING_TABLE),
+ DEFINE_BIT(BRW_NEW_STATE_BASE_ADDRESS),
{0, 0, 0}
};