i965/gen10: Enable float blend optimization

[mesa.git] / src / mesa / drivers / dri / i965 / brw_state_upload.c

diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 9e1cf54abdacca73a58232e3d9d3413e85244374..9e64213c2e7b49b57e003a58cbc1b0acd9fdb542 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -62,6 +62,12 @@ brw_upload_initial_gpu_state(struct brw_context *brw)
 
    brw_upload_invariant_state(brw);
 
+   if (devinfo->gen == 10) {
+      brw_load_register_imm32(brw, GEN10_CACHE_MODE_SS,
+                              REG_MASK(GEN10_FLOAT_BLEND_OPTIMIZATION_ENABLE) |
+                              GEN10_FLOAT_BLEND_OPTIMIZATION_ENABLE);
+   }
+
    if (devinfo->gen == 9) {
       /* Recommended optimizations for Victim Cache eviction and floating
        * point blending.