i965: Hook up the disassembler for INTEL_DEBUG={wm,vs}.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_structs.h
index 39e75a0455e633d843653054ad841a6e2bd451c1..a3e9823c51a8933f47b86cd8a7f6f64ca57074c6 100644 (file)
@@ -823,7 +823,9 @@ struct brw_gs_unit_state
 
    struct
    {
-      GLuint pad0:10;
+      GLuint pad0:8;
+      GLuint rendering_enable:1; /* for IGDNG */
+      GLuint pad4:1;
       GLuint stats_enable:1; 
       GLuint nr_urb_entries:7; 
       GLuint pad1:1;
@@ -931,6 +933,28 @@ struct brw_wm_unit_state
    
    GLfloat global_depth_offset_constant;  
    GLfloat global_depth_offset_scale;   
+   
+   /* for IGDNG only */
+   struct {
+      GLuint pad0:1;
+      GLuint grf_reg_count_1:3; 
+      GLuint pad1:2;
+      GLuint kernel_start_pointer_1:26;
+   } wm8;       
+
+   struct {
+      GLuint pad0:1;
+      GLuint grf_reg_count_2:3; 
+      GLuint pad1:2;
+      GLuint kernel_start_pointer_2:26;
+   } wm9;       
+
+   struct {
+      GLuint pad0:1;
+      GLuint grf_reg_count_3:3; 
+      GLuint pad1:2;
+      GLuint kernel_start_pointer_3:26;
+   } wm10;       
 };
 
 struct brw_sampler_default_color {
@@ -1204,7 +1228,9 @@ struct brw_instruction
         GLuint dest_reg_type:3;
         GLuint src0_reg_file:2;
         GLuint src0_reg_type:3;
-        GLuint pad:6;
+        GLuint src1_reg_file:2;        /* 0x00000c00 */
+        GLuint src1_reg_type:3;        /* 0x00007000 */
+        GLuint pad:1;
         GLint dest_indirect_offset:10; /* offset against the deref'd address reg */
         GLuint dest_subreg_nr:3; /* subnr for the address reg a0.x */
         GLuint dest_horiz_stride:2;
@@ -1219,7 +1245,7 @@ struct brw_instruction
         GLuint src0_reg_type:3;
         GLuint src1_reg_file:2;
         GLuint src1_reg_type:3;
-        GLuint pad0:1;
+        GLuint pad:1;
         GLuint dest_writemask:4;
         GLuint dest_subreg_nr:1;
         GLuint dest_reg_nr:8;
@@ -1306,6 +1332,14 @@ struct brw_instruction
         GLuint pad1:6;
       } ia16;
 
+       struct 
+       {
+           GLuint pad:26;
+           GLuint end_of_thread:1;
+           GLuint pad1:1;
+           GLuint sfid:4;
+       } send_igdng;  /* for IGDNG only */
+
    } bits2;
 
    union
@@ -1316,7 +1350,7 @@ struct brw_instruction
         GLuint src1_reg_nr:8;
         GLuint src1_abs:1;
         GLuint src1_negate:1;
-        GLuint pad:1;
+        GLuint src1_address_mode:1;
         GLuint src1_horiz_stride:2;
         GLuint src1_width:3;
         GLuint src1_vert_stride:4;
@@ -1331,7 +1365,7 @@ struct brw_instruction
         GLuint src1_reg_nr:8;
         GLuint src1_abs:1;
         GLuint src1_negate:1;
-        GLuint pad0:1;
+        GLuint src1_address_mode:1;
         GLuint src1_swz_z:2;
         GLuint src1_swz_w:2;
         GLuint pad1:1;
@@ -1345,7 +1379,7 @@ struct brw_instruction
         GLuint src1_subreg_nr:3;
         GLuint src1_abs:1;
         GLuint src1_negate:1;
-        GLuint pad0:1;
+        GLuint src1_address_mode:1;
         GLuint src1_horiz_stride:2;
         GLuint src1_width:3;
         GLuint src1_vert_stride:4;
@@ -1392,6 +1426,21 @@ struct brw_instruction
         GLuint end_of_thread:1;
       } math;
 
+      struct {
+        GLuint function:4;
+        GLuint int_type:1;
+        GLuint precision:1;
+        GLuint saturate:1;
+        GLuint data_type:1;
+        GLuint snapshot:1;
+        GLuint pad0:10;
+        GLuint header_present:1;
+        GLuint response_length:5;
+        GLuint msg_length:4;
+        GLuint pad1:2;
+        GLuint end_of_thread:1;
+      } math_igdng;
+
       struct {
         GLuint binding_table_index:8;
         GLuint sampler:4;
@@ -1415,8 +1464,37 @@ struct brw_instruction
          GLuint end_of_thread:1;
       } sampler_g4x;
 
+      struct {
+        GLuint binding_table_index:8;
+        GLuint sampler:4;
+        GLuint msg_type:4;
+        GLuint simd_mode:2;
+        GLuint pad0:1;
+        GLuint header_present:1;
+        GLuint response_length:5;
+        GLuint msg_length:4;
+        GLuint pad1:2;
+        GLuint end_of_thread:1;
+      } sampler_igdng;
+
       struct brw_urb_immediate urb;
 
+      struct {
+        GLuint opcode:4;
+        GLuint offset:6;
+        GLuint swizzle_control:2; 
+        GLuint pad:1;
+        GLuint allocate:1;
+        GLuint used:1;
+        GLuint complete:1;
+        GLuint pad0:3;
+        GLuint header_present:1;
+        GLuint response_length:5;
+        GLuint msg_length:4;
+        GLuint pad1:2;
+        GLuint end_of_thread:1;
+      } urb_igdng;
+
       struct {
         GLuint binding_table_index:8;
         GLuint msg_control:4;  
@@ -1429,6 +1507,19 @@ struct brw_instruction
         GLuint end_of_thread:1;
       } dp_read;
 
+      struct {
+        GLuint binding_table_index:8;
+        GLuint msg_control:3;  
+        GLuint msg_type:3;  
+        GLuint target_cache:2;    
+        GLuint pad0:3;
+        GLuint header_present:1;
+        GLuint response_length:5;
+        GLuint msg_length:4;
+        GLuint pad1:2;
+        GLuint end_of_thread:1;
+      } dp_read_igdng;
+
       struct {
         GLuint binding_table_index:8;
         GLuint msg_control:3;
@@ -1442,6 +1533,20 @@ struct brw_instruction
         GLuint end_of_thread:1;
       } dp_write;
 
+      struct {
+        GLuint binding_table_index:8;
+        GLuint msg_control:3;
+        GLuint pixel_scoreboard_clear:1;
+        GLuint msg_type:3;    
+        GLuint send_commit_msg:1;
+        GLuint pad0:3;
+        GLuint header_present:1;
+        GLuint response_length:5;
+        GLuint msg_length:4;
+        GLuint pad1:2;
+        GLuint end_of_thread:1;
+      } dp_write_igdng;
+
       struct {
         GLuint pad:16;
         GLuint response_length:4;
@@ -1451,8 +1556,18 @@ struct brw_instruction
         GLuint end_of_thread:1;
       } generic;
 
+      struct {
+        GLuint pad:19;
+        GLuint header_present:1;
+        GLuint response_length:5;
+        GLuint msg_length:4;
+        GLuint pad1:2;
+        GLuint end_of_thread:1;
+      } generic_igdng;
+
       GLint d;
       GLuint ud;
+      float f;
    } bits3;
 };