*/
#include "brw_context.h"
-#include "brw_nir.h"
+#include "compiler/brw_nir.h"
#include "brw_program.h"
-#include "brw_shader.h"
#include "brw_state.h"
#include "program/prog_parameter.h"
#include "nir_builder.h"
nir_ssa_def *invoc_id =
nir_load_system_value(&b, nir_intrinsic_load_invocation_id, 0);
- nir->info->inputs_read = key->outputs_written;
- nir->info->outputs_written = key->outputs_written;
- nir->info->tcs.vertices_out = key->input_vertices;
- nir->info->name = ralloc_strdup(nir, "passthrough");
+ nir->info.inputs_read = key->outputs_written &
+ ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER);
+ nir->info.outputs_written = key->outputs_written;
+ nir->info.tess.tcs_vertices_out = key->input_vertices;
+ nir->info.name = ralloc_strdup(nir, "passthrough");
nir->num_uniforms = 8 * sizeof(uint32_t);
var = nir_variable_create(nir, nir_var_uniform, glsl_vec4_type(), "hdr_0");
}
/* Copy inputs to outputs. */
- uint64_t varyings = key->outputs_written;
+ uint64_t varyings = nir->info.inputs_read;
while (varyings != 0) {
const int varying = ffsll(varyings) - 1;
}
static void
-brw_tcs_debug_recompile(struct brw_context *brw,
- struct gl_shader_program *shader_prog,
+brw_tcs_debug_recompile(struct brw_context *brw, struct gl_program *prog,
const struct brw_tcs_prog_key *key)
{
- struct brw_cache_item *c = NULL;
- const struct brw_tcs_prog_key *old_key = NULL;
- bool found = false;
-
perf_debug("Recompiling tessellation control shader for program %d\n",
- shader_prog->Name);
-
- for (unsigned int i = 0; i < brw->cache.size; i++) {
- for (c = brw->cache.items[i]; c; c = c->next) {
- if (c->cache_id == BRW_CACHE_TCS_PROG) {
- old_key = c->key;
+ prog->Id);
- if (old_key->program_string_id == key->program_string_id)
- break;
- }
- }
- if (c)
- break;
- }
+ bool found = false;
+ const struct brw_tcs_prog_key *old_key =
+ brw_find_previous_compile(&brw->cache, BRW_CACHE_TCS_PROG,
+ key->program_string_id);
- if (!c) {
+ if (!old_key) {
perf_debug(" Didn't find previous compile in the shader cache for "
"debug\n");
return;
}
static bool
-brw_codegen_tcs_prog(struct brw_context *brw,
- struct gl_shader_program *shader_prog,
- struct brw_program *tcp,
- struct brw_program *tep,
- struct brw_tcs_prog_key *key)
+brw_codegen_tcs_prog(struct brw_context *brw, struct brw_program *tcp,
+ struct brw_program *tep, struct brw_tcs_prog_key *key)
{
struct gl_context *ctx = &brw->ctx;
const struct brw_compiler *compiler = brw->screen->compiler;
prog_data.base.base.nr_params = param_count;
if (tcp) {
- brw_assign_common_binding_table_offsets(MESA_SHADER_TESS_CTRL, devinfo,
- shader_prog, &tcp->program,
+ brw_assign_common_binding_table_offsets(devinfo, &tcp->program,
&prog_data.base.base, 0);
prog_data.base.base.image_param =
tcp->program.info.num_images);
prog_data.base.base.nr_image_params = tcp->program.info.num_images;
- brw_nir_setup_glsl_uniforms(nir, shader_prog, &tcp->program,
- &prog_data.base.base,
+ brw_nir_setup_glsl_uniforms(nir, &tcp->program, &prog_data.base.base,
compiler->scalar_stage[MESA_SHADER_TESS_CTRL]);
+ brw_nir_analyze_ubo_ranges(compiler, tcp->program.nir,
+ prog_data.base.base.ubo_ranges);
} else {
/* Upload the Patch URB Header as the first two uniforms.
* Do the annoying scrambling so the shader doesn't have to.
st_index = brw_get_shader_time_index(brw, &tep->program, ST_TCS, true);
if (unlikely(brw->perf_debug)) {
- start_busy = brw->batch.last_bo && drm_intel_bo_busy(brw->batch.last_bo);
+ start_busy = brw->batch.last_bo && brw_bo_busy(brw->batch.last_bo);
start_time = get_time();
}
&program_size, &error_str);
if (program == NULL) {
if (tep) {
- tep->program.sh.data->LinkStatus = false;
+ tep->program.sh.data->LinkStatus = linking_failure;
ralloc_strcat(&tep->program.sh.data->InfoLog, error_str);
}
if (unlikely(brw->perf_debug)) {
if (tcp) {
if (tcp->compiled_once) {
- brw_tcs_debug_recompile(brw, shader_prog, key);
+ brw_tcs_debug_recompile(brw, &tcp->program, key);
}
tcp->compiled_once = true;
}
- if (start_busy && !drm_intel_bo_busy(brw->batch.last_bo)) {
+ if (start_busy && !brw_bo_busy(brw->batch.last_bo)) {
perf_debug("TCS compile took %.03f ms and stalled the GPU\n",
(get_time() - start_time) * 1000);
}
/* We need to specialize our code generation for tessellation levels
* based on the domain the DS is expecting to tessellate.
*/
- key->tes_primitive_mode = tep->program.info.tes.primitive_mode;
+ key->tes_primitive_mode = tep->program.info.tess.primitive_mode;
key->quads_workaround = brw->gen < 9 &&
- tep->program.info.tes.primitive_mode == GL_QUADS &&
- tep->program.info.tes.spacing == GL_EQUAL;
+ tep->program.info.tess.primitive_mode == GL_QUADS &&
+ tep->program.info.tess.spacing == TESS_SPACING_EQUAL;
if (tcp) {
key->program_string_id = tcp->id;
void
brw_upload_tcs_prog(struct brw_context *brw)
{
- struct gl_shader_program **current = brw->ctx._Shader->CurrentProgram;
struct brw_stage_state *stage_state = &brw->tcs.base;
struct brw_tcs_prog_key key;
/* BRW_NEW_TESS_PROGRAMS */
&key, sizeof(key),
&stage_state->prog_offset,
&brw->tcs.base.prog_data)) {
- bool success = brw_codegen_tcs_prog(brw, current[MESA_SHADER_TESS_CTRL],
- tcp, tep, &key);
+ bool success = brw_codegen_tcs_prog(brw, tcp, tep, &key);
assert(success);
(void)success;
}
brw_setup_tex_for_precompile(brw, &key.tex, prog);
/* Guess that the input and output patches have the same dimensionality. */
- if (brw->gen < 8) {
- key.input_vertices = shader_prog->
- _LinkedShaders[MESA_SHADER_TESS_CTRL]->info.TessCtrl.VerticesOut;
- }
+ if (brw->gen < 8)
+ key.input_vertices = prog->info.tess.tcs_vertices_out;
struct brw_program *btep;
if (tes) {
btep = brw_program(tes->Program);
- key.tes_primitive_mode = tes->info.TessEval.PrimitiveMode;
+ key.tes_primitive_mode = tes->Program->info.tess.primitive_mode;
key.quads_workaround = brw->gen < 9 &&
- tes->info.TessEval.PrimitiveMode == GL_QUADS &&
- tes->info.TessEval.Spacing == GL_EQUAL;
+ tes->Program->info.tess.primitive_mode == GL_QUADS &&
+ tes->Program->info.tess.spacing == TESS_SPACING_EQUAL;
} else {
btep = NULL;
key.tes_primitive_mode = GL_TRIANGLES;
}
- key.outputs_written = prog->nir->info->outputs_written;
- key.patch_outputs_written = prog->nir->info->patch_outputs_written;
+ key.outputs_written = prog->nir->info.outputs_written;
+ key.patch_outputs_written = prog->nir->info.patch_outputs_written;
- success = brw_codegen_tcs_prog(brw, shader_prog, btcp, btep, &key);
+ success = brw_codegen_tcs_prog(brw, btcp, btep, &key);
brw->tcs.base.prog_offset = old_prog_offset;
brw->tcs.base.prog_data = old_prog_data;