i965/gen9: Optimize slice and subslice load balancing behavior.

[mesa.git] / src / mesa / drivers / dri / i965 / brw_tcs.c

diff --git a/src/mesa/drivers/dri/i965/brw_tcs.c b/src/mesa/drivers/dri/i965/brw_tcs.c
index 1c4d79886388e0aaedb47d5f2345c3e3b2326f94..b5290ec50688d0d8f492bfae9221b6767169694b 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_tcs.c
+++ b/src/mesa/drivers/dri/i965/brw_tcs.c
@@ -127,7 +127,7 @@ brw_codegen_tcs_prog(struct brw_context *brw, struct brw_program *tcp,
       if (tcp) {
          if (tcp->compiled_once) {
             brw_debug_recompile(brw, MESA_SHADER_TESS_CTRL, tcp->program.Id,
-                                key->program_string_id, key);
+                                &key->base);
          }
          tcp->compiled_once = true;
       }
@@ -160,6 +160,7 @@ brw_tcs_populate_key(struct brw_context *brw,
                      struct brw_tcs_prog_key *key)
 {
    const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct brw_compiler *compiler = brw->screen->compiler;
    struct brw_program *tcp =
       (struct brw_program *) brw->programs[MESA_SHADER_TESS_CTRL];
    struct brw_program *tep =
@@ -177,7 +178,7 @@ brw_tcs_populate_key(struct brw_context *brw,
       per_patch_slots |= prog->info.patch_outputs_written;
    }
 
-   if (devinfo->gen < 8 || !tcp)
+   if (devinfo->gen < 8 || !tcp || compiler->use_tcs_8_patch)
       key->input_vertices = brw->ctx.TessCtrlProgram.patch_vertices;
    key->outputs_written = per_vertex_slots;
    key->patch_outputs_written = per_patch_slots;
@@ -191,10 +192,8 @@ brw_tcs_populate_key(struct brw_context *brw,
                            tep->program.info.tess.spacing == TESS_SPACING_EQUAL;
 
    if (tcp) {
-      key->program_string_id = tcp->id;
-
       /* _NEW_TEXTURE */
-      brw_populate_sampler_prog_key_data(&brw->ctx, &tcp->program, &key->tex);
+      brw_populate_base_prog_key(&brw->ctx, tcp, &key->base);
    }
 }
 
@@ -206,7 +205,7 @@ brw_upload_tcs_prog(struct brw_context *brw)
    /* BRW_NEW_TESS_PROGRAMS */
    struct brw_program *tcp =
       (struct brw_program *) brw->programs[MESA_SHADER_TESS_CTRL];
-   MAYBE_UNUSED struct brw_program *tep =
+   ASSERTED struct brw_program *tep =
       (struct brw_program *) brw->programs[MESA_SHADER_TESS_EVAL];
    assert(tep);
 
@@ -228,9 +227,9 @@ brw_upload_tcs_prog(struct brw_context *brw)
 
    tcp = (struct brw_program *) brw->programs[MESA_SHADER_TESS_CTRL];
    if (tcp)
-      tcp->id = key.program_string_id;
+      tcp->id = key.base.program_string_id;
 
-   MAYBE_UNUSED bool success = brw_codegen_tcs_prog(brw, tcp, tep, &key);
+   ASSERTED bool success = brw_codegen_tcs_prog(brw, tcp, tep, &key);
    assert(success);
 }
 
@@ -247,11 +246,10 @@ brw_tcs_populate_default_key(const struct brw_compiler *compiler,
 
    memset(key, 0, sizeof(*key));
 
-   key->program_string_id = btcp->id;
-   brw_setup_tex_for_precompile(devinfo, &key->tex, prog);
+   brw_populate_default_base_prog_key(devinfo, btcp, &key->base);
 
    /* Guess that the input and output patches have the same dimensionality. */
-   if (devinfo->gen < 8)
+   if (devinfo->gen < 8 || compiler->use_tcs_8_patch)
       key->input_vertices = prog->info.tess.tcs_vertices_out;
 
    if (tes) {