i965/vec4: remove the generator hack for dual instanced GS

[mesa.git] / src / mesa / drivers / dri / i965 / brw_tes.c

diff --git a/src/mesa/drivers/dri/i965/brw_tes.c b/src/mesa/drivers/dri/i965/brw_tes.c
index 27dc7e59f5d1fb43ffda1c72570e3afaf1a3070e..e14ae865a39ebc2e92bfdbfe116e83148b656579 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_tes.c
+++ b/src/mesa/drivers/dri/i965/brw_tes.c
@@ -150,10 +150,9 @@ brw_codegen_tes_prog(struct brw_context *brw,
     * padding around uniform values below vec4 size, so the worst case is that
     * every uniform is a float which gets padded to the size of a vec4.
     */
-   struct gl_shader *tes = shader_prog->_LinkedShaders[MESA_SHADER_TESS_EVAL];
-   int param_count = nir->num_uniforms;
-   if (!compiler->scalar_stage[MESA_SHADER_TESS_EVAL])
-      param_count *= 4;
+   struct gl_linked_shader *tes =
+      shader_prog->_LinkedShaders[MESA_SHADER_TESS_EVAL];
+   int param_count = nir->num_uniforms / 4;
 
    prog_data.base.base.param =
       rzalloc_array(NULL, const gl_constant_value *, param_count);
@@ -164,6 +163,10 @@ brw_codegen_tes_prog(struct brw_context *brw,
    prog_data.base.base.nr_params = param_count;
    prog_data.base.base.nr_image_params = tes->NumImages;
 
+   prog_data.base.cull_distance_mask =
+      ((1 << tep->program.Base.CullDistanceArraySize) - 1) <<
+      tep->program.Base.ClipDistanceArraySize;
+
    brw_nir_setup_glsl_uniforms(nir, shader_prog, &tep->program.Base,
                                &prog_data.base.base,
                                compiler->scalar_stage[MESA_SHADER_TESS_EVAL]);
@@ -212,11 +215,9 @@ brw_codegen_tes_prog(struct brw_context *brw,
    }
 
    /* Scratch space is used for register spilling */
-   if (prog_data.base.base.total_scratch) {
-      brw_get_scratch_bo(brw, &stage_state->scratch_bo,
-                        prog_data.base.base.total_scratch *
-                         brw->max_ds_threads);
-   }
+   brw_alloc_stage_scratch(brw, stage_state,
+                           prog_data.base.base.total_scratch,
+                           brw->max_ds_threads);
 
    brw_upload_cache(&brw->cache, BRW_CACHE_TES_PROG,
                     key, sizeof(*key),
@@ -262,8 +263,7 @@ brw_upload_tes_prog(struct brw_context *brw,
    key.patch_inputs_read = per_patch_slots;
 
    /* _NEW_TEXTURE */
-   brw_populate_sampler_prog_key_data(ctx, prog, stage_state->sampler_count,
-                                      &key.tex);
+   brw_populate_sampler_prog_key_data(ctx, prog, &key.tex);
 
    if (!brw_search_cache(&brw->cache, BRW_CACHE_TES_PROG,
                          &key, sizeof(key),