i965: Mostly fix glsl-max-varyings.

[mesa.git] / src / mesa / drivers / dri / i965 / brw_tex_layout.c

diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c
index 3ab27c26ef8122f550e2d799e4c7f7de8db94a2d..768ccfd79c432d2bd49875fd01db1a7c3b13f99c 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
+++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
@@ -28,7 +28,6 @@
   * Authors:
   *   Keith Whitwell <keith@tungstengraphics.com>
   */
-        
 
 /* Code to layout images in a mipmap tree for i965.
  */
@@ -40,14 +39,44 @@
 
 #define FILE_DEBUG_FLAG DEBUG_MIPTREE
 
-GLboolean brw_miptree_layout( struct intel_context *intel, struct intel_mipmap_tree *mt )
+GLboolean brw_miptree_layout(struct intel_context *intel,
+                            struct intel_mipmap_tree *mt,
+                            uint32_t tiling)
 {
-   /* XXX: these vary depending on image format: 
-    */
-/*    GLint align_w = 4; */
+   /* XXX: these vary depending on image format: */
+   /* GLint align_w = 4; */
 
    switch (mt->target) {
-   case GL_TEXTURE_CUBE_MAP: 
+   case GL_TEXTURE_CUBE_MAP:
+      if (intel->gen == 5) {
+          GLuint align_h = 2;
+          GLuint level;
+          GLuint qpitch = 0;
+         int h0, h1, q;
+
+         /* On Ironlake, cube maps are finally represented as just a series
+          * of MIPLAYOUT_BELOW 2D textures (like 2D texture arrays), separated
+          * by a pitch of qpitch rows, where qpitch is defined by the equation
+          * given in Volume 1 of the BSpec.
+          */
+         h0 = ALIGN(mt->height0, align_h);
+         h1 = ALIGN(minify(h0), align_h);
+         qpitch = (h0 + h1 + 11 * align_h);
+          if (mt->compressed)
+            qpitch /= 4;
+
+         i945_miptree_layout_2d(intel, mt, tiling, 6);
+
+          for (level = mt->first_level; level <= mt->last_level; level++) {
+            for (q = 0; q < 6; q++) {
+               intel_miptree_set_image_offset(mt, level, q, 0, q * qpitch);
+            }
+          }
+         mt->total_height = qpitch * 6;
+
+          break;
+      }
+
    case GL_TEXTURE_3D: {
       GLuint width  = mt->width0;
       GLuint height = mt->height0;
@@ -59,25 +88,25 @@ GLboolean brw_miptree_layout( struct intel_context *intel, struct intel_mipmap_t
       GLuint align_w = 4;
 
       mt->total_height = 0;
-      
+      intel_get_texture_alignment_unit(mt->internal_format, &align_w, &align_h);
+
       if (mt->compressed) {
-          align_w = intel_compressed_alignment(mt->internal_format);
-          mt->pitch = ALIGN(width, align_w);
+          mt->total_width = ALIGN(width, align_w);
           pack_y_pitch = (height + 3) / 4;
       } else {
-          mt->pitch = intel_miptree_pitch_align (intel, mt, mt->width0);
-          pack_y_pitch = ALIGN(mt->height0, align_h);
+        mt->total_width = mt->width0;
+        pack_y_pitch = ALIGN(mt->height0, align_h);
       }
 
-      pack_x_pitch = mt->pitch;
+      pack_x_pitch = width;
       pack_x_nr = 1;
 
-      for ( level = mt->first_level ; level <= mt->last_level ; level++ ) {
+      for (level = mt->first_level ; level <= mt->last_level ; level++) {
         GLuint nr_images = mt->target == GL_TEXTURE_3D ? depth : 6;
         GLint x = 0;
         GLint y = 0;
         GLint q, j;
-           
+
         intel_miptree_set_level_info(mt, level, nr_images,
                                      0, mt->total_height,
                                      width, height, depth);
@@ -89,7 +118,7 @@ GLboolean brw_miptree_layout( struct intel_context *intel, struct intel_mipmap_t
            }
 
            x = 0;
-           y += pack_y_pitch;      
+           y += pack_y_pitch;
         }
 
 
@@ -98,25 +127,25 @@ GLboolean brw_miptree_layout( struct intel_context *intel, struct intel_mipmap_t
         height = minify(height);
         depth  = minify(depth);
 
-    if (mt->compressed) {
-        pack_y_pitch = (height + 3) / 4;
-        
-        if (pack_x_pitch > ALIGN(width, align_w)) {
-            pack_x_pitch = ALIGN(width, align_w);
-            pack_x_nr <<= 1;
-        }
-    } else {
-        if (pack_x_pitch > 4) {
-            pack_x_pitch >>= 1;
-            pack_x_nr <<= 1;
-            assert(pack_x_pitch * pack_x_nr <= mt->pitch);
-        }
-
-        if (pack_y_pitch > 2) {
-            pack_y_pitch >>= 1;
-            pack_y_pitch = ALIGN(pack_y_pitch, align_h);
-        }
-    }
+        if (mt->compressed) {
+           pack_y_pitch = (height + 3) / 4;
+
+           if (pack_x_pitch > ALIGN(width, align_w)) {
+              pack_x_pitch = ALIGN(width, align_w);
+              pack_x_nr <<= 1;
+           }
+        } else {
+           if (pack_x_pitch > 4) {
+              pack_x_pitch >>= 1;
+              pack_x_nr <<= 1;
+              assert(pack_x_pitch * pack_x_nr <= mt->total_width);
+           }
+
+           if (pack_y_pitch > 2) {
+              pack_y_pitch >>= 1;
+              pack_y_pitch = ALIGN(pack_y_pitch, align_h);
+           }
+        }
 
       }
       /* The 965's sampler lays cachelines out according to how accesses
@@ -133,15 +162,12 @@ GLboolean brw_miptree_layout( struct intel_context *intel, struct intel_mipmap_t
    }
 
    default:
-      i945_miptree_layout_2d(intel, mt);
+      i945_miptree_layout_2d(intel, mt, tiling, 1);
       break;
    }
-   DBG("%s: %dx%dx%d - sz 0x%x\n", __FUNCTION__, 
-               mt->pitch, 
-               mt->total_height,
-               mt->cpp,
-               mt->pitch * mt->total_height * mt->cpp );
-               
+   DBG("%s: %dx%dx%d\n", __FUNCTION__,
+       mt->total_width, mt->total_height, mt->cpp);
+
    return GL_TRUE;
 }