i965: Make INTEL_DEBUG=bat decode VS/CLIP/GS/SF/WM/CC_STATE on Gen4-5.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_urb.c
index e76db6af976f9246431ef9188d19285a9756e293..1ba981a5464196583dcd844952b05042a09c517d 100644 (file)
@@ -115,7 +115,7 @@ static bool check_urb_layout(struct brw_context *brw)
 static void recalculate_urb_fence( struct brw_context *brw )
 {
    GLuint csize = brw->curbe.total_size;
-   GLuint vsize = brw->vs.prog_data->base.urb_entry_size;
+   GLuint vsize = brw_vue_prog_data(brw->vs.base.prog_data)->urb_entry_size;
    GLuint sfsize = brw->sf.prog_data->urb_entry_size;
 
    if (csize < limits[CS].min_entry_size)
@@ -139,11 +139,11 @@ static void recalculate_urb_fence( struct brw_context *brw )
       brw->urb.sfsize = sfsize;
       brw->urb.vsize = vsize;
 
-      brw->urb.nr_vs_entries = limits[VS].preferred_nr_entries;        
-      brw->urb.nr_gs_entries = limits[GS].preferred_nr_entries;        
+      brw->urb.nr_vs_entries = limits[VS].preferred_nr_entries;
+      brw->urb.nr_gs_entries = limits[GS].preferred_nr_entries;
       brw->urb.nr_clip_entries = limits[CLP].preferred_nr_entries;
-      brw->urb.nr_sf_entries = limits[SF].preferred_nr_entries;        
-      brw->urb.nr_cs_entries = limits[CS].preferred_nr_entries;        
+      brw->urb.nr_sf_entries = limits[SF].preferred_nr_entries;
+      brw->urb.nr_cs_entries = limits[CS].preferred_nr_entries;
 
       brw->urb.constrained = 0;
 
@@ -168,18 +168,18 @@ static void recalculate_urb_fence( struct brw_context *brw )
       }
 
       if (!check_urb_layout(brw)) {
-        brw->urb.nr_vs_entries = limits[VS].min_nr_entries;    
-        brw->urb.nr_gs_entries = limits[GS].min_nr_entries;    
+        brw->urb.nr_vs_entries = limits[VS].min_nr_entries;
+        brw->urb.nr_gs_entries = limits[GS].min_nr_entries;
         brw->urb.nr_clip_entries = limits[CLP].min_nr_entries;
-        brw->urb.nr_sf_entries = limits[SF].min_nr_entries;    
-        brw->urb.nr_cs_entries = limits[CS].min_nr_entries;    
+        brw->urb.nr_sf_entries = limits[SF].min_nr_entries;
+        brw->urb.nr_cs_entries = limits[CS].min_nr_entries;
 
         /* Mark us as operating with constrained nr_entries, so that next
          * time we recalculate we'll resize the fences in the hope of
          * escaping constrained mode and getting back to normal performance.
          */
         brw->urb.constrained = 1;
-       
+
         if (!check_urb_layout(brw)) {
            /* This is impossible, given the maximal sizes of urb
             * entries and the values for minimum nr of entries
@@ -188,7 +188,7 @@ static void recalculate_urb_fence( struct brw_context *brw )
            fprintf(stderr, "couldn't calculate URB layout!\n");
            exit(1);
         }
-       
+
         if (unlikely(INTEL_DEBUG & (DEBUG_URB|DEBUG_PERF)))
            fprintf(stderr, "URB CONSTRAINED\n");
       }
@@ -204,7 +204,7 @@ done:
                  brw->urb.cs_start,
                  brw->urb.size);
 
-      brw->state.dirty.brw |= BRW_NEW_URB_FENCE;
+      brw->ctx.NewDriverState |= BRW_NEW_URB_FENCE;
    }
 }
 
@@ -212,7 +212,8 @@ done:
 const struct brw_tracked_state brw_recalculate_urb_fence = {
    .dirty = {
       .mesa = 0,
-      .brw = BRW_NEW_CURBE_OFFSETS |
+      .brw = BRW_NEW_BLORP |
+             BRW_NEW_PUSH_CONSTANT_ALLOCATION |
              BRW_NEW_SF_PROG_DATA |
              BRW_NEW_VS_PROG_DATA,
    },
@@ -249,10 +250,10 @@ void brw_upload_urb_fence(struct brw_context *brw)
    uf.bits1.cs_fence  = brw->urb.size;
 
    /* erratum: URB_FENCE must not cross a 64byte cacheline */
-   if ((brw->batch.used & 15) > 12) {
-      int pad = 16 - (brw->batch.used & 15);
+   if ((USED_BATCH(brw->batch) & 15) > 12) {
+      int pad = 16 - (USED_BATCH(brw->batch) & 15);
       do
-        brw->batch.map[brw->batch.used++] = MI_NOOP;
+         *brw->batch.map_next++ = MI_NOOP;
       while (--pad);
    }