mesa: add/update comments in _mesa_copy_buffer_subdata()

[mesa.git] / src / mesa / drivers / dri / i965 / brw_vec4.h

diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h
index 5f4426880f4fa97ec88b496868de62d7f45ce0a3..2555fa71059d6645c61d9fe6532859715b80fd4f 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -47,10 +47,10 @@ class dst_reg;
  * channels, as that will tell optimization passes that those other
  * channels are used.
  */
-static int
+static unsigned
 swizzle_for_size(int size)
 {
-   int size_swizzles[4] = {
+   static const unsigned size_swizzles[4] = {
       BRW_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
       BRW_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y),
       BRW_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z),
@@ -210,6 +210,16 @@ public:
       this->reg = reg;
    }
 
+   dst_reg(register_file file, int reg, const glsl_type *type, int writemask)
+   {
+      init();
+
+      this->file = file;
+      this->reg = reg;
+      this->type = brw_type_for_base_type(type);
+      this->writemask = writemask;
+   }
+
    dst_reg(struct brw_reg reg)
    {
       init();
@@ -261,6 +271,7 @@ public:
    int conditional_mod; /**< BRW_CONDITIONAL_* */
 
    int sampler;
+   uint32_t texture_offset; /**< Texture Offset bitfield */
    int target; /**< MRT target. */
    bool shadow_compare;
 
@@ -276,6 +287,7 @@ public:
    ir_instruction *ir;
    const char *annotation;
 
+   bool is_tex();
    bool is_math();
 };
 
@@ -485,6 +497,8 @@ public:
    void emit_math2_gen4(enum opcode opcode, dst_reg dst, src_reg src0, src_reg src1);
    void emit_math(enum opcode opcode, dst_reg dst, src_reg src0, src_reg src1);
 
+   void swizzle_result(ir_texture *ir, src_reg orig_val, int sampler);
+
    void emit_ndc_computation();
    void emit_psiz_and_flags(struct brw_reg reg);
    void emit_clip_distances(struct brw_reg reg, int offset);
@@ -509,7 +523,8 @@ public:
                                src_reg orig_src,
                                int base_offset);
 
-   GLboolean try_emit_sat(ir_expression *ir);
+   bool try_emit_sat(ir_expression *ir);
+   void resolve_ud_negate(src_reg *reg);
 
    bool process_move_condition(ir_rvalue *ir);
 
@@ -532,6 +547,14 @@ public:
                            struct brw_reg dst,
                            struct brw_reg src0,
                            struct brw_reg src1);
+   void generate_math2_gen7(vec4_instruction *inst,
+                           struct brw_reg dst,
+                           struct brw_reg src0,
+                           struct brw_reg src1);
+
+   void generate_tex(vec4_instruction *inst,
+                    struct brw_reg dst,
+                    struct brw_reg src);
 
    void generate_urb_write(vec4_instruction *inst);
    void generate_oword_dual_block_offsets(struct brw_reg m1,