struct gl_shader_program *shader_prog,
gl_shader_stage stage,
void *mem_ctx,
- bool debug_flag,
bool no_spills,
shader_time_shader_type st_base,
shader_time_shader_type st_written,
vec4_instruction *IF(src_reg src0, src_reg src1,
enum brw_conditional_mod condition);
vec4_instruction *IF(enum brw_predicate predicate);
- EMIT1(PULL_CONSTANT_LOAD)
EMIT1(SCRATCH_READ)
EMIT2(SCRATCH_WRITE)
EMIT3(LRP)
virtual vec4_instruction *emit_urb_write_opcode(bool complete) = 0;
virtual int compute_array_stride(ir_dereference_array *ir);
- const bool debug_flag;
-
private:
/**
* If true, then register allocation should fail instead of spilling.
struct brw_reg dst,
struct brw_reg surf_index,
struct brw_reg offset);
- void generate_unpack_flags(vec4_instruction *inst,
- struct brw_reg dst);
+ void generate_unpack_flags(struct brw_reg dst);
void generate_untyped_atomic(vec4_instruction *inst,
struct brw_reg dst,