i965: Pass number of components explicitly to brw_untyped_atomic and _surface_read.

[mesa.git] / src / mesa / drivers / dri / i965 / brw_vec4.h

diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h
index 649dc6112b7df8cc069e044a19d3b9a9cac5baf2..a24f843b11278fd9fef4e5e4f51b601033710b56 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -84,7 +84,6 @@ public:
                struct gl_shader_program *shader_prog,
                 gl_shader_stage stage,
                void *mem_ctx,
-                bool debug_flag,
                 bool no_spills,
                 shader_time_shader_type st_base,
                 shader_time_shader_type st_written,
@@ -398,8 +397,6 @@ protected:
    virtual vec4_instruction *emit_urb_write_opcode(bool complete) = 0;
    virtual int compute_array_stride(ir_dereference_array *ir);
 
-   const bool debug_flag;
-
 private:
    /**
     * If true, then register allocation should fail instead of spilling.
@@ -498,8 +495,7 @@ private:
                                          struct brw_reg dst,
                                          struct brw_reg surf_index,
                                          struct brw_reg offset);
-   void generate_unpack_flags(vec4_instruction *inst,
-                              struct brw_reg dst);
+   void generate_unpack_flags(struct brw_reg dst);
 
    void generate_untyped_atomic(vec4_instruction *inst,
                                 struct brw_reg dst,