src_reg src2 = src_reg());
struct brw_reg get_dst(void);
- struct brw_reg get_src(int i);
+ struct brw_reg get_src(const struct brw_vec4_prog_data *prog_data, int i);
dst_reg dst;
src_reg src[3];
int target; /**< MRT target. */
bool shadow_compare;
- bool eot;
+ enum brw_urb_write_flags urb_write_flags;
bool header_present;
int mlen; /**< SEND message length */
int base_mrf; /**< First MRF in the SEND message, if mlen is nonzero. */
void setup_uniform_values(ir_variable *ir);
void setup_builtin_uniform_values(ir_variable *ir);
int setup_uniforms(int payload_reg);
- void setup_payload();
bool reg_allocate_trivial();
bool reg_allocate();
void evaluate_spill_costs(float *spill_costs, bool *no_spill);
vec4_instruction *FBH(dst_reg dst, src_reg value);
vec4_instruction *FBL(dst_reg dst, src_reg value);
vec4_instruction *CBIT(dst_reg dst, src_reg value);
+ vec4_instruction *MAD(dst_reg dst, src_reg c, src_reg b, src_reg a);
int implied_mrf_writes(vec4_instruction *inst);
protected:
void emit_vertex();
void lower_attributes_to_hw_regs(const int *attribute_map);
+ void setup_payload_interference(struct ra_graph *g, int first_payload_node,
+ int reg_node_count);
virtual dst_reg *make_reg_for_system_value(ir_variable *ir) = 0;
- virtual int setup_attributes(int payload_reg) = 0;
+ virtual void setup_payload() = 0;
virtual void emit_prolog() = 0;
virtual void emit_program_code() = 0;
virtual void emit_thread_end() = 0;
protected:
virtual dst_reg *make_reg_for_system_value(ir_variable *ir);
- virtual int setup_attributes(int payload_reg);
+ virtual void setup_payload();
virtual void emit_prolog();
virtual void emit_program_code();
virtual void emit_thread_end();
virtual vec4_instruction *emit_urb_write_opcode(bool complete);
private:
+ int setup_attributes(int payload_reg);
void setup_vp_regs();
dst_reg get_vp_dst_reg(const prog_dst_register &dst);
src_reg get_vp_src_reg(const prog_src_register &src);
struct brw_reg dst,
struct brw_reg src);
- void generate_urb_write(vec4_instruction *inst);
+ void generate_vs_urb_write(vec4_instruction *inst);
+ void generate_gs_urb_write(vec4_instruction *inst);
+ void generate_gs_thread_end(vec4_instruction *inst);
+ void generate_gs_set_write_offset(struct brw_reg dst,
+ struct brw_reg src0,
+ struct brw_reg src1);
+ void generate_gs_set_vertex_count(struct brw_reg dst,
+ struct brw_reg src);
+ void generate_gs_set_dword_2_immed(struct brw_reg dst, struct brw_reg src);
void generate_oword_dual_block_offsets(struct brw_reg m1,
struct brw_reg index);
void generate_scratch_write(vec4_instruction *inst,
void mark_surface_used(unsigned surf_index);
struct brw_context *brw;
- struct gl_context *ctx;
struct brw_compile *p;