i965: Use sample barycentric coordinates with per sample shading

[mesa.git] / src / mesa / drivers / dri / i965 / brw_vec4_copy_propagation.cpp

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp b/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp
index 1a667ebf2b2e7943758f86aeca393b39faedac51..c8feff84d5676c545d621aa8f0102e0f024dd882 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp
@@ -95,16 +95,33 @@ try_constant_propagation(vec4_instruction *inst, int arg, src_reg *values[4])
       inst->src[arg] = value;
       return true;
 
+   case BRW_OPCODE_BFI1:
+   case BRW_OPCODE_ASR:
+   case BRW_OPCODE_SHL:
+   case BRW_OPCODE_SHR:
+   case BRW_OPCODE_SUBB:
+      if (arg == 1) {
+         inst->src[arg] = value;
+         return true;
+      }
+      break;
+
+   case BRW_OPCODE_MACH:
    case BRW_OPCODE_MUL:
    case BRW_OPCODE_ADD:
+   case BRW_OPCODE_OR:
+   case BRW_OPCODE_AND:
+   case BRW_OPCODE_XOR:
+   case BRW_OPCODE_ADDC:
       if (arg == 1) {
         inst->src[arg] = value;
         return true;
       } else if (arg == 0 && inst->src[1].file != IMM) {
         /* Fit this constant in by commuting the operands.  Exception: we
-         * can't do this for 32-bit integer MUL because it's asymmetric.
+         * can't do this for 32-bit integer MUL/MACH because it's asymmetric.
          */
-        if (inst->opcode == BRW_OPCODE_MUL &&
+        if ((inst->opcode == BRW_OPCODE_MUL ||
+              inst->opcode == BRW_OPCODE_MACH) &&
             (inst->src[1].type == BRW_REGISTER_TYPE_D ||
              inst->src[1].type == BRW_REGISTER_TYPE_UD))
            break;
@@ -160,8 +177,7 @@ try_constant_propagation(vec4_instruction *inst, int arg, src_reg *values[4])
 }
 
 bool
-vec4_visitor::try_copy_propagation(struct intel_context *intel,
-                                   vec4_instruction *inst, int arg,
+vec4_visitor::try_copy_propagation(vec4_instruction *inst, int arg,
                                    src_reg *values[4])
 {
    /* For constant propagation, we only handle the same constant
@@ -205,14 +221,16 @@ vec4_visitor::try_copy_propagation(struct intel_context *intel,
    if (inst->src[arg].negate)
       value.negate = !value.negate;
 
-   bool has_source_modifiers = (value.negate || value.abs ||
-                                value.swizzle != BRW_SWIZZLE_XYZW ||
-                                value.file == UNIFORM);
+   bool has_source_modifiers = value.negate || value.abs;
 
    /* gen6 math and gen7+ SENDs from GRFs ignore source modifiers on
     * instructions.
     */
-   if (has_source_modifiers && !can_do_source_mods(inst))
+   if ((has_source_modifiers || value.file == UNIFORM ||
+        value.swizzle != BRW_SWIZZLE_XYZW) && !can_do_source_mods(inst))
+      return false;
+
+   if (has_source_modifiers && value.type != inst->src[arg].type)
       return false;
 
    bool is_3src_inst = (inst->opcode == BRW_OPCODE_LRP ||
@@ -222,6 +240,9 @@ vec4_visitor::try_copy_propagation(struct intel_context *intel,
    if (is_3src_inst && value.file == UNIFORM)
       return false;
 
+   if (inst->is_send_from_grf())
+      return false;
+
    /* We can't copy-propagate a UD negation into a condmod
     * instruction, because the condmod ends up looking at the 33-bit
     * signed accumulator value instead of the 32-bit value we wanted
@@ -304,7 +325,7 @@ vec4_visitor::opt_copy_propagation()
            continue;
 
         if (try_constant_propagation(inst, i, values) ||
-            try_copy_propagation(intel, inst, i, values))
+            try_copy_propagation(inst, i, values))
            progress = true;
       }
 
@@ -346,7 +367,7 @@ vec4_visitor::opt_copy_propagation()
    }
 
    if (progress)
-      live_intervals_valid = false;
+      invalidate_live_intervals();
 
    return progress;
 }