i965/vec4: Make with_writemask() non-static.

[mesa.git] / src / mesa / drivers / dri / i965 / brw_vec4_emit.cpp

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
index 11eeca144f54ceea957231c848eacccfd70ebd29..bf04bd9881e25aed0cdea336bc708b89c4d61cad 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
@@ -155,7 +155,7 @@ vec4_generator::~vec4_generator()
 void
 vec4_generator::mark_surface_used(unsigned surf_index)
 {
-   assert(surf_index < BRW_MAX_VS_SURFACES);
+   assert(surf_index < BRW_MAX_VEC4_SURFACES);
 
    prog_data->binding_table_size = MAX2(prog_data->binding_table_size,
                                         surf_index + 1);
@@ -386,7 +386,7 @@ vec4_generator::generate_tex(vec4_instruction *inst,
              dst,
              inst->base_mrf,
              src,
-             SURF_INDEX_VS_TEXTURE(inst->sampler),
+             SURF_INDEX_VEC4_TEXTURE(inst->sampler),
              inst->sampler,
              msg_type,
              1, /* response length */
@@ -395,7 +395,7 @@ vec4_generator::generate_tex(vec4_instruction *inst,
              BRW_SAMPLER_SIMD_MODE_SIMD4X2,
              return_format);
 
-   mark_surface_used(SURF_INDEX_VS_TEXTURE(inst->sampler));
+   mark_surface_used(SURF_INDEX_VEC4_TEXTURE(inst->sampler));
 }
 
 void
@@ -501,6 +501,20 @@ vec4_generator::generate_gs_set_vertex_count(struct brw_reg dst,
    brw_pop_insn_state(p);
 }
 
+void
+vec4_generator::generate_gs_set_dword_2_immed(struct brw_reg dst,
+                                              struct brw_reg src)
+{
+   assert(src.file == BRW_IMMEDIATE_VALUE);
+
+   brw_push_insn_state(p);
+   brw_set_access_mode(p, BRW_ALIGN_1);
+   brw_set_mask_control(p, BRW_MASK_DISABLE);
+   brw_MOV(p, suboffset(vec1(dst), 2), src);
+   brw_set_access_mode(p, BRW_ALIGN_16);
+   brw_pop_insn_state(p);
+}
+
 void
 vec4_generator::generate_oword_dual_block_offsets(struct brw_reg m1,
                                                   struct brw_reg index)
@@ -985,9 +999,13 @@ vec4_generator::generate_vec4_instruction(vec4_instruction *instruction,
       generate_gs_set_vertex_count(dst, src[0]);
       break;
 
+   case GS_OPCODE_SET_DWORD_2_IMMED:
+      generate_gs_set_dword_2_immed(dst, src[0]);
+      break;
+
    case SHADER_OPCODE_SHADER_TIME_ADD:
-      brw_shader_time_add(p, src[0], SURF_INDEX_VS_SHADER_TIME);
-      mark_surface_used(SURF_INDEX_VS_SHADER_TIME);
+      brw_shader_time_add(p, src[0], SURF_INDEX_VEC4_SHADER_TIME);
+      mark_surface_used(SURF_INDEX_VEC4_SHADER_TIME);
       break;
 
    case VS_OPCODE_UNPACK_FLAGS_SIMD4X2:
@@ -996,10 +1014,10 @@ vec4_generator::generate_vec4_instruction(vec4_instruction *instruction,
 
    default:
       if (inst->opcode < (int) ARRAY_SIZE(opcode_descs)) {
-         _mesa_problem(ctx, "Unsupported opcode in `%s' in VS\n",
+         _mesa_problem(&brw->ctx, "Unsupported opcode in `%s' in VS\n",
                        opcode_descs[inst->opcode].name);
       } else {
-         _mesa_problem(ctx, "Unsupported opcode %d in VS", inst->opcode);
+         _mesa_problem(&brw->ctx, "Unsupported opcode %d in VS", inst->opcode);
       }
       abort();
    }