i965/vec4: Don't lose the force_writemask_all flag during CSE.

[mesa.git] / src / mesa / drivers / dri / i965 / brw_vec4_gs_visitor.cpp

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp
index ad3204fcfe2444dc16bc3dfae6ae64fa3b6383d3..2002ffd64285fc2e0d47a2bf030c0c080c044f4b 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp
@@ -28,6 +28,7 @@
  */
 
 #include "brw_vec4_gs_visitor.h"
+#include "gen6_gs_visitor.h"
 
 const unsigned MAX_GS_INPUT_VERTICES = 6;
 
@@ -40,7 +41,7 @@ vec4_gs_visitor::vec4_gs_visitor(struct brw_context *brw,
                                  bool no_spills)
    : vec4_visitor(brw, &c->base, &c->gp->program.Base, &c->key.base,
                   &c->prog_data.base, prog, MESA_SHADER_GEOMETRY, mem_ctx,
-                  INTEL_DEBUG & DEBUG_GS, no_spills,
+                  no_spills,
                   ST_GS, ST_GS_WRITTEN, ST_GS_RESET),
      c(c)
 {
@@ -149,7 +150,7 @@ vec4_gs_visitor::emit_prolog()
     */
    this->current_annotation = "clear r0.2";
    dst_reg r0(retype(brw_vec4_grf(0, 0), BRW_REGISTER_TYPE_UD));
-   vec4_instruction *inst = emit(GS_OPCODE_SET_DWORD_2_IMMED, r0, 0u);
+   vec4_instruction *inst = emit(GS_OPCODE_SET_DWORD_2, r0, 0u);
    inst->force_writemask_all = true;
 
    /* Create a virtual register to hold the vertex count */
@@ -610,13 +611,13 @@ static const unsigned *
 generate_assembly(struct brw_context *brw,
                   struct gl_shader_program *shader_prog,
                   struct gl_program *prog,
-                  struct brw_vec4_prog_data *prog_data,
+                  struct brw_vue_prog_data *prog_data,
                   void *mem_ctx,
                   const cfg_t *cfg,
                   unsigned *final_assembly_size)
 {
    vec4_generator g(brw, shader_prog, prog, prog_data, mem_ctx,
-                    INTEL_DEBUG & DEBUG_GS);
+                    INTEL_DEBUG & DEBUG_GS, "geometry", "GS");
    return g.generate_assembly(cfg, final_assembly_size);
 }
 
@@ -631,22 +632,24 @@ brw_gs_emit(struct brw_context *brw,
       struct brw_shader *shader =
          (brw_shader *) prog->_LinkedShaders[MESA_SHADER_GEOMETRY];
 
-      brw_dump_ir(brw, "geometry", prog, &shader->base, NULL);
+      brw_dump_ir("geometry", prog, &shader->base, NULL);
    }
 
-   /* Compile the geometry shader in DUAL_OBJECT dispatch mode, if we can do
-    * so without spilling. If the GS invocations count > 1, then we can't use
-    * dual object mode.
-    */
-   if (c->prog_data.invocations <= 1 &&
-       likely(!(INTEL_DEBUG & DEBUG_NO_DUAL_OBJECT_GS))) {
-      c->prog_data.dispatch_mode = GEN7_GS_DISPATCH_MODE_DUAL_OBJECT;
-
-      vec4_gs_visitor v(brw, c, prog, mem_ctx, true /* no_spills */);
-      if (v.run()) {
-         return generate_assembly(brw, prog, &c->gp->program.Base,
-                                  &c->prog_data.base, mem_ctx, v.cfg,
-                                  final_assembly_size);
+   if (brw->gen >= 7) {
+      /* Compile the geometry shader in DUAL_OBJECT dispatch mode, if we can do
+       * so without spilling. If the GS invocations count > 1, then we can't use
+       * dual object mode.
+       */
+      if (c->prog_data.invocations <= 1 &&
+          likely(!(INTEL_DEBUG & DEBUG_NO_DUAL_OBJECT_GS))) {
+         c->prog_data.dispatch_mode = GEN7_GS_DISPATCH_MODE_DUAL_OBJECT;
+
+         vec4_gs_visitor v(brw, c, prog, mem_ctx, true /* no_spills */);
+         if (v.run()) {
+            return generate_assembly(brw, prog, &c->gp->program.Base,
+                                     &c->prog_data.base, mem_ctx, v.cfg,
+                                     final_assembly_size);
+         }
       }
    }
 
@@ -673,20 +676,30 @@ brw_gs_emit(struct brw_context *brw,
     * mode is more performant when invocations > 1. Gen6 only supports
     * SINGLE mode.
     */
-   if (c->prog_data.invocations <= 1)
+   if (c->prog_data.invocations <= 1 || brw->gen < 7)
       c->prog_data.dispatch_mode = GEN7_GS_DISPATCH_MODE_SINGLE;
    else
       c->prog_data.dispatch_mode = GEN7_GS_DISPATCH_MODE_DUAL_INSTANCE;
 
-   vec4_gs_visitor v(brw, c, prog, mem_ctx, false /* no_spills */);
-   if (!v.run()) {
+   vec4_gs_visitor *gs = NULL;
+   const unsigned *ret = NULL;
+
+   if (brw->gen >= 7)
+      gs = new vec4_gs_visitor(brw, c, prog, mem_ctx, false /* no_spills */);
+   else
+      gs = new gen6_gs_visitor(brw, c, prog, mem_ctx, false /* no_spills */);
+
+   if (!gs->run()) {
       prog->LinkStatus = false;
-      ralloc_strcat(&prog->InfoLog, v.fail_msg);
-      return NULL;
+      ralloc_strcat(&prog->InfoLog, gs->fail_msg);
+   } else {
+      ret = generate_assembly(brw, prog, &c->gp->program.Base,
+                              &c->prog_data.base, mem_ctx, gs->cfg,
+                              final_assembly_size);
    }
 
-   return generate_assembly(brw, prog, &c->gp->program.Base, &c->prog_data.base,
-                            mem_ctx, v.cfg, final_assembly_size);
+   delete gs;
+   return ret;
 }